• Formal Verification Engineer

    NVIDIA (Santa Clara, CA)
    As a Formal Verification Engineer at NVIDIA, you will work in the formal verification team for the industry's leading chips. We are looking for ... of formal methods. The engineer will own the task of formal verification of RTL units for next generation chip designs. This will involve the candidate… more
    NVIDIA (11/05/25)
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  • Sr. Formal Verification

    Amazon (Cupertino, CA)
    …to deliver high performance at low cost. Key job responsibilities - Develop formal verification plans, implement and verify state-of-the-art IP architectures. - ... & Career Growth Our team is dedicated to supporting new members. We have a broad mix of experience...related field - 7+ years of practical experience with formal verification as IP/Block owner, or equivalent… more
    Amazon (10/31/25)
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  • Senior Verification Engineer

    Microsoft Corporation (San Jose, CA)
    …and make a difference to millions of people across the planet. As a Senior Verification Engineer in the Accelnet Hardware team, you will be responsible for ... Microsoft. This is a unique opportunity for a Senior Verification Engineer to see Register-Transfer Level (RTL)...functional coverage, and assertions, as well as familiarity with formal verification techniques. + 1+ year(s) of… more
    Microsoft Corporation (10/28/25)
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  • Senior Design Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Perform pre-silicon ... cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high...Perl + Hands-on experience in Formal property verification , formal verification of computational… more
    Microsoft Corporation (10/31/25)
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  • Senior Design Verification Engineer

    Google (Mountain View, CA)
    Senior Design Verification Engineer , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and ... with an emphasis on computer architecture. + Experience in different verification techniques and methodologies including formal , Gate-Level Simulation, Unified… more
    Google (10/16/25)
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  • Design Verification Engineer

    Arrow Electronics (Mountain View, CA)
    **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC ... functional and technical specification documents * Implement and maintain integrated end-to-end formal verification flow for the formal verification more
    Arrow Electronics (09/25/25)
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  • Principal Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    verification environments in industry standard languages like SVTB UVM or formal verification . **Other** **Requirements** **:** Ability to meet Microsoft, ... manage and optimize the Cloud infrastructure. We are looking for a **Principal** ** Verification ** ** Engineer ** to join the team. **Responsibilities** + Lead an… more
    Microsoft Corporation (11/01/25)
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  • Senior Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** + Establish yourself ... cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high...environments in industry standard languages like SVTB UVM or formal verification . **Other Requirements:** Ability to meet… more
    Microsoft Corporation (10/31/25)
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  • Staff ASIC Design Verification

    Google (Mountain View, CA)
    Staff ASIC Design Verification Engineer , Platforms and Devices _corporate_fare_ Google _place_ Mountain View, CA, USA **Advanced** Experience owning outcomes and ... emphasis on computer architecture. + 12 years of experience with building verification methodologies that span simulation, formal , emulation and FPGA… more
    Google (10/01/25)
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  • Senior Circuit Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior Circuit Verification Engineer to join our dynamic and growing team. Designing RAMs at leading edge process nodes ... of innovative circuits. + Support designer efforts in running formal verification , electronic rule checking, and other...products. + Engaging with industry tool AEs to qualify new tool releases, learn about new tool… more
    NVIDIA (09/09/25)
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