• Sr. Principal Analog IC Designer

    Cadence Design Systems, Inc. (San Jose, CA)
    …to make an impact on the world of technology. The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC ... should include a minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development + Working knowledge of a set of common SerDes… more
    Cadence Design Systems, Inc. (07/04/25)
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  • IC Packaging, Principal AE

    Cadence Design Systems, Inc. (San Jose, CA)
    …Technical Field Organization in the Silicon Package Board group, with a focus on IC Package design solutions. If you like to develop solutions for challenging ... of the Cadence tool set in the context of multiple flows including IC Packaging, high speed design , signal integrity and electrical constraints definition.… more
    Cadence Design Systems, Inc. (06/08/25)
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  • IC Physical Design Flow, Principal…

    Cadence Design Systems, Inc. (San Jose, CA)
    …drive Pre-sales and Post-sales activities at advanced nodes for Cadence Digital IC products. Key Responsibilities + Provide technical support to Cadence customers in ... the areas of Digital Design Implementation & Signoff including... Compiler) + Experience with EDA tools in the IC digital implementation & signoff flows (STA tools) +… more
    Cadence Design Systems, Inc. (07/18/25)
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  • RF/Analog IC Design Engineer

    Qualcomm (Santa Clara, CA)
    …Qualcomm Atheros, Inc. **Job Area:** Engineering Group, Engineering Group > RFIC Design **General Summary:** Define, design and develop complex radio frequency ... signal path and circuit topology analysis and detailed transistor-level design of highly-integrated transceivers and associated blocks for wireless applications,… more
    Qualcomm (05/29/25)
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  • Design Engineer, Senior Director

    Applied Materials (Santa Clara, CA)
    …more about careers at Applied. A 3D IC (Integrated Circuit) Package Designer is responsible for the development and design of advanced packaging solutions ... in a team environment. **Preferred Qualifications:** + Certifications: Relevant certifications in IC design or packaging may be an advantage. + Advanced… more
    Applied Materials (05/10/25)
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  • Physical Design , Sr Principal AE

    Cadence Design Systems, Inc. (San Jose, CA)
    …in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. The greater ... engagements, you will enhance your in-depth knowledge in nanometer design , unlock unique expertise in digital design ...Static Timing Analysis is required + Prior experience with IC digital implementation flows and backend EDA tools including… more
    Cadence Design Systems, Inc. (07/19/25)
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  • Senior Principal Physical Design AE

    Cadence Design Systems, Inc. (San Jose, CA)
    …innovating for the most advanced companies in the world. Through Cadence's Electronic Design Automation (EDA) products, we've worked with a wide range of customers, ... and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts...Static Timing Analysis is required + Prior experience with IC digital implementation flows and backend EDA tools including… more
    Cadence Design Systems, Inc. (06/28/25)
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  • Principal Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …Team in the System Design and Analysis group, with focus on Advanced IC Package Routing, Technologies, and Flows. As an IC Packaging Product Engineer, you ... Packaging experience. + Proficient in Allegro X Advanced Package Designer (APD). + Routing experience of large and complex...routing requirements is preferred. + Industry knowledge of advanced IC Packaging technologies and design flows. +… more
    Cadence Design Systems, Inc. (07/18/25)
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  • Power Design Engineer

    Celestica (San Jose, CA)
    …is the brand behind the brands you love in tech and we design , develop, and manufacture leading-edge Hardware Platform Solutions in Networking, Storage, and Server ... (DDR4/DDR5) and high-speed PCB layout. You will work with design , software/firmware, mechanical and thermal engineers. You will lead...create and maintain the preferred list + DC relevant IC selection, create and maintain the preferred list +… more
    Celestica (05/28/25)
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  • Physical Design , R&D, Principal Software…

    Cadence Design Systems, Inc. (San Jose, CA)
    …This key Innovus R&D group is responsible for logical and physical optimization of the design which helps to meet the PPA targets of the designs. This is critical ... chip), routing congestion (wiring of the circuits in the design with least detouring and no shorts), etc. We...non-linear, and combinatorial optimization. Prior R&D experience working on IC physical designs tools. Hands on experience using the… more
    Cadence Design Systems, Inc. (06/14/25)
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