- Broadcom (San Jose, CA)
- …and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. . Drive Test plans for all features for Block/Core/SOC and ... and get to full Functional coverage and bring the Verification to closure . Debug Regression failures, analyze Functional...in an efficient way. . Lead the documentation of verification strategy including Test plans, Verification Environment,… more
- Broadcom (San Jose, CA)
- …Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology . Build pseudo-random tests to verify and get to full ... Coverage gaps and improve tests to cover the gaps . Document verification strategy including Test plans, Verification Environment, pseudo-random tests, etc.… more
- Insight Global (Milpitas, CA)
- …analog and mixed-signal semiconductor solutions is looking for a Senior or Principal IC Design Engineer to join their advanced connectivity team. This group ... a hands-on technical role requiring strong circuit-level design experience and full IC tapeout ownership. Key Responsibilities: Design and tapeout BiCMOS ICs for… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Senior Principal Design Engineer The Sr Principal Analog IC Designer is responsible for design and ... developing analog/mixed-signal IC circuit blocks, the architecture and initial concept/specification through final verification of conformance to customer… more
- Broadcom (Irvine, CA)
- …compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team. Job Description: Layout design of digital high-performance ... the blocks with best PPA (power/performance/area) Debug LVS/DRC/ERC errors with verification tool Analyze the trade-offs and performance implications of different… more
- Broadcom (Irvine, CA)
- …Participate in system level architectural design of broadband communications SoCs. Complete verification of the analog blocks in the laboratory. Support ATE, debug ... and production. Typically requires an M.SC./Phd in electrical engineering with 6+ years of experience. Able to make system level judgment and associated trade-offs. Strong grasp of low noise, high linearity design. Experience in high resolution, high bandwidth… more
- Broadcom (San Jose, CA)
- …and device physics knowledge to help solve circuit design, layout, physical verification , and post-layout extraction challenges and problems. + Experience in all ... phases of CAD tools from evaluation, QA, test, release, and user support to documentation + Expert in Cadence Skill, Perl, Unix Shell and utilities + Excellent interpersonal, communication, and presentation skills, along with strong multi-tasking skills,… more
- US Tech Solutions (Goleta, CA)
- …Description:** + We are seeking a highly skilled and meticulous SystemVerilog/UVM Design Verification Test Engineer to play a crucial role in validating our ... **Experience (Required):** + 3+ years of professional experience specifically in IC /SOC Design Verification (DV). + Mandatory expert-level proficiency in… more
- The Boeing Company (Huntington Beach, CA)
- …Weapons Systems has an exciting opportunity for multiple **ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal)** to join us as part of our ... high-integrity, low SWAP-C flight computers. And we're applying the latest digital IC design processes with industry-best tools to enable applications that cut… more
- Power Integrations (San Jose, CA)
- The role of the Principal Product Definition Engineer is to analyze customer requirements, create full application solutions and specify new integrated circuits ... In the process of specifying new integrated circuits, the Senior Systems Engineer will use advanced simulation techniques to develop algorithms and prototype… more