- Cerebras (Sunnyvale, CA)
- …over 10 times faster than GPU-based hyperscale cloud inference services. About The Role As a lead front-end design engineer , you will be a key part of the ... Wafer Scale Engine (WSE). This role requires deep expertise in RTL design and integration, with a strong focus on delivering high-performance, power-efficient,… more
- Advanced Micro Devices (Santa Clara, CA)
- …The ideal candidate will have a proven track record in creating scalable digital microarchitectures and will work closely with various teams to ensure the successful ... delivery of complex SoCs. Candidates must possess excellent leadership, communication, and collaboration skills. A background in computer engineering or electrical engineering is preferred. #J-18808-Ljbffr more
- Advanced Micro Devices (Santa Clara, CA)
- …AMD. KEY RESPONSIBILITIES Technical Microarchitecture lead on AMD Data Fabric RTL design team focused on driving the best scalability, modularity, power, ... In this role the candidate will work with IP and SOC Architecture team, RTL design team, verification team, and physical design team to drive the … more
- Intel Corporation (Santa Clara, CA)
- …seeking a Senior Design Engineer - AI SoC Development in California to lead logic design and RTL coding for cutting-edge AI applications. The ideal ... candidate will have over 7 years of experience in ASIC/SoC development, strong technical skills, and a collaborative mindset. Responsibilities include defining architecture, optimizing designs for performance and power, and mentoring junior engineers. This… more
- Theconstructsim (Milpitas, CA)
- A semiconductor solutions company based in Milpitas, CA, is seeking a Sr Design Verification Engineer to oversee verification methodologies and collaborate with ... design teams to ensure compliance with project specifications. The ideal candidate will possess a BS/MS in Computer Science or Electrical Engineering and have 5-10+ years of experience in high volume IC production, including strong UVM capabilities and… more
- Cerebras (Sunnyvale, CA)
- A leading AI hardware company in California seeks a lead front-end design engineer to spearhead the next generation of its groundbreaking Wafer Scale Engine. ... The ideal candidate will possess 10+ years of RTL design experience and a master's degree, with skills in high-performance computing and collaboration with… more
- Eridu Corporation (San Francisco, CA)
- A technology startup in San Francisco is seeking a PCIe Lead Engineer to provide technical leadership in microarchitecture and RTL execution. Candidates ... should have an MSEE and over 15 years of ASIC/SoC RTL design experience, specifically in PCIe protocol design . You will develop high-performance PCIe… more
- Intel Corporation (Santa Clara, CA)
- # **Welcome!**## .Senior Design Engineer - AI SoC Development page is loaded## Senior Design Engineer - AI SoC Developmentlocations: US, California, ... Computer Engineering, or Computer Science* 7+ years of experience in RTL design and implementation for ASIC/SoC development**Preferred Qualifications** *… more
- Altera (San Jose, CA)
- …on our journey to becoming the world's #1 FPGA company!**About the Role**As a Sr. Physical Design Tech Lead / Engineer at Altera, you will play a critical role ... logic blocks, routing fabrics, I/O rings, on-chip power domains).**Key Responsibilities** Lead and execute physical design implementation tasks (floorplanning,… more
- Cadence Design Systems (San Jose, CA)
- Lead Applications Engineer DDR Design IP page is loaded## Lead Applications Engineer DDR Design IPlocations: SAN JOSEtime type: Full timeposted ... matter where you are in your career. As a Lead Technical Presales Engineer , you will use...definers and designers Write application notes, user guides, articles, design ideas, new product proposals, and evaluation kit manuscripts… more