- NVIDIA (Santa Clara, CA)
- …make a lasting impact on the world! We are now looking for an Low Power Design/Verification ASIC Engineer - New College Grad 2025. We continue to rapidly ... to deliver exceptional perf/watt solutions in a wide range of sectors. Come join NVIDIAs Low Power DV team to develop state of the art GPUs to power AI,… more
- Qualcomm (San Diego, CA)
- … ASIC engineers with excellent analytical and technical skills, and a focus on low power , high performance ASIC designs, and, ability to execute critical ... low power designs. + Strong knowledge in the entire low power , high performance ASIC /SoC design flows (micro-architecture, RTL design, verification,… more
- The Boeing Company (Huntington Beach, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will develop ... processors using the latest ARM IP to enable high-integrity, low SWAP-C flight computers. And we're applying the latest...determine the optimal parts, weighing Schedule, Cost, Risk, Area, Power (SCRAP) vs. performance + Implement FPGA/ ASIC … more
- SpaceX (Irvine, CA)
- … power intent verification and post synthesis timing validation flows + Execute low power design and physical synthesis, deploying knowledge of unified ... Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer...flow, top-down and bottom-up design methodologies + Knowledge of low - power methodologies and leakage/dynamic power … more
- Qualcomm (San Diego, CA)
- …with mixed-signal IPs, such as SerDes, DDR, and Die-to-Die links - Experience in low - power digital design - Experience in creating tools and automation flows (in ... Qualcomm mixed-signal IP design team is seeking talented senior ASIC digital designers to join our efforts in developing...- Apply computer architecture and optimization techniques for improving power , performance, and area of the IPs - Assist… more
- Meta (Sunnyvale, CA)
- …for individuals with experience in backend implementation from Netlist to GDSII in low power and high-performance designs to build efficient System on Chip ... (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop...and power grid planning. 19. Experience with low power implementation, power gating,… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Propose, implement ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...in clock domain crossing, IP-XACT based register verification and low power 20. Experience with development of… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...in clock domain crossing, IP-XACT based register verification and low power 21. Experience with development of… more
- Meta (Sunnyvale, CA)
- …Memories. 23. Knowledge of STA signoff and understanding of AOCV, POCV 24. Experience with low power techniques for reducing power . 25. Experience with EDA ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical… more
- Meta (Sunnyvale, CA)
- …Memories. 20. Knowledge of STA signoff and understanding of AOCV, POCV 21. Experience with low power techniques for reducing power . 22. Experience with EDA ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical… more