- Qualcomm (San Diego, CA)
- … team to complete the IP design implementation. + Support SoC team to integrate low power / power management IP solution into wireless SoC chips and ... functional safety feature in automotive SoC product. + Create/Enhance low power methodologies covering entire design...cycle from RTL to GDS. Analyze how a new methodology will affect different phases of the design… more
- Qualcomm (Santa Clara, CA)
- …ARM IPs. Experience in SoC low power micro-architecture, low power design and methodology , Power Intent/Implementation, power estimates, ... IPs. Experience in SoC low power micro-architecture, low power design and methodology , Power Intent/Implementation, power estimates, … more
- Qualcomm (San Diego, CA)
- …of next Generation, high performance, low power Memory Subsystem RTL Design , flows and methodology for high performance ASICs in sub-4nm process for ... low power designs. + Strong knowledge in the entire low power , high performance ASIC/SoC design flows (micro-architecture, RTL design ,… more
- Amazon (Cupertino, CA)
- …multiple vendor solutions and driving tool decisions. - Experience in high-performance, low - power physical design , and implementation techniques with ... today. Key job responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud infrastructure to support… more
- Qualcomm (San Diego, CA)
- … analysis concepts and on-hands experience with PTPX etc. ⦁ Sound conceptual understanding of low power design techniques like voltage/ power islands, ... and validate new flows and methodologies ⦁ Work on design power profiling and electromigration analysis ⦁...in languages such as Python, TCL, Perl ⦁ Strong methodology development background. Ability to drive solutions by creating… more
- NVIDIA (Santa Clara, CA)
- … Engineering + Proven track record of PPA improvement on high performance and low power designs in advanced technology nodes + Strong understanding of physical ... with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all...files such as UPF, and use of FSDB/SAIFs for power optimization + Understanding of hierarchical design ,… more
- Qualcomm (San Diego, CA)
- …issues wrt constraints validation, verification, STA, Physical design , etc. + Knowledge of low power flow ( power gating, multi-Vt flow, power supply ... to high frequency design convergence for physical design with PPA targets and PDN methodology ....**Principal Duties and responsibilities:** + Complete ownership on Conformal Low Power and Formal Verification signoff for… more
- Qualcomm (San Diego, CA)
- …the rare opportunity to have real impact in shaping 5G product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and ... + Experience with pre-silicon emulation platform-based verification + Knowledge of Power design , architecture, and verification requirements + Displays a… more
- Qualcomm (San Diego, CA)
- …the rare opportunity to have real impact in shaping 5G product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and ... in the whole industry. As an SOC Verification and Methodology Engineer, you will be responsible for ensuring the...AMBA Bus, DDR, GPU, Multimedia etc. + Knowledge of Power design , architecture, and verification requirements +… more
- Qualcomm (San Diego, CA)
- …+ **Required Skills:** + Understanding of SoC Power Delivery Network architectures, Low Power Design Techniques for different market segment products ... IPs on emulation and post-silicon platforms. + Collaborate with IP/ Design Teams and power architects to define...+ Strong familiarity with Static Timing Analysis and Physical Design tools & methodology . + Solid understanding… more