• Firmware Engineer - Memory

    NVIDIA (Santa Clara, CA)
    We are looking for a Firmware Engineer for our Memory Subsystem Team! Widely considered to be one of the technology world's most desirable employers, NVIDIA ... in Artificial Intelligence, High- Performance Computing and Visualization. NVIDIA's SoC Memory Subsystem team is looking for curious, collaborative, and… more
    NVIDIA (01/10/26)
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  • Firmware Engineer , Memory

    NVIDIA (Santa Clara, CA)
    …We are looking for a Firmware Engineer - New College Grad to join our Memory Subsystem Team! What you'll be doing: + Firmware Design & Execution: Design and ... Tune the DRAM interface and manage the memory subsystem configuration, including enhancements to initialization, functionality, performance optimization,… more
    NVIDIA (01/10/26)
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  • Senior Power and Performance

    NVIDIA (Santa Clara, CA)
    …MS degree in EE/CE or equivalent experience. + 8+ years of experience in memory subsystem architecture, design, and validation, with a strong focus on ... us today. NVIDIA Silicon Solutions Group seeks a hardworking engineer to join a silicon HW team. As a...desired. What you'll be doing: + Build roadmaps of memory system-level features to address low power, low noise,… more
    NVIDIA (01/10/26)
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  • Senior Memory System Engineer

    NVIDIA (Santa Clara, CA)
    …is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems Engineer at NVIDIA, you'll join a ... Doing: + Analyze future DDR/LPDDR/HBM technologies to determine optimum performance , power, function and RAS in memory ...optimum performance , power, function and RAS in memory for Next generation SOC and Systems. + Collaborate… more
    NVIDIA (01/10/26)
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  • Sr Principal Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …to work with an experienced team focused on the development and support of high- performance IP related to memory protocols such as DDR, LPDDR, HBM, and ... in our world. We are seeking a Post Silicon Memory Product Engineer to support silicon bring-up,...and recommendations to customers. + Analyze and resolve complex subsystem application or implementation issues. + Contribute to documentation,… more
    Cadence Design Systems, Inc. (11/22/25)
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  • Sr Hardware Development Engineer

    Amazon (Cupertino, CA)
    …successive debugging/root-causing memory failure - 5+ years of experience in memory / memory subsystem design Preferred Qualifications - Master's degree in ... leading memory standardization through JEDEC, CPU architecture, RAS, DDR Memory technology, system performance , security and troubleshooting - Repeated… more
    Amazon (01/06/26)
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  • Performance Engineer , Low-Level…

    Meta (Menlo Park, CA)
    …power savings and enabling new platforms at Meta. **Required Skills:** Performance Engineer , Low-Level Libraries Responsibilities: 1. Develop and optimize ... years of professional C/C++ experience 7. Knowledge of computer architecture, CPU and memory subsystem , and OS-level resource management 8. Experience using … more
    Meta (12/20/25)
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  • Senior Developer Technology Engineer

    NVIDIA (Santa Clara, CA)
    …etc. + In-depth expertise with CPU/GPU architecture fundamentals, especially memory subsystem . + Domain expertise in high performance databases, ETL and data ... NVIDIA is currently seeking a Senior Developer Technology Engineer for High- Performance Databases! Would you... Databases! Would you enjoy researching new algorithms and memory management techniques to accelerate databases on modern computer… more
    NVIDIA (12/01/25)
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  • Developer Technology Engineer , High-…

    NVIDIA (Santa Clara, CA)
    …etc. + In-depth expertise with CPU/GPU architecture fundamentals, especially memory subsystem . + Domain expertise in high performance databases, ETL, data ... time to join our team! NVIDIA is currently seeking a Developer Technology Engineer for High- Performance Databases! Would you enjoy researching new algorithms and… more
    NVIDIA (01/06/26)
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  • Principal Digital Engineer

    Renesas (San Jose, CA)
    …Chip architecture, design, and integration: MCU and peripherals, embedded flash and SRAM memory subsystem , on-chip bus system, DMA and interrupt system + Digital ... Principal Digital Engineer Job Description This is an opportunity to...an opportunity to join Renesas Infrastructure and Mixed-Signal Division, Memory Interface Product Line. You will join the team… more
    Renesas (12/23/25)
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