• Firmware Engineer, Annapurna Labs, ML…

    Amazon (Cupertino, CA)
    …Engineer to join our Power Architecture team, developing firmware algorithms for power and performance management on ML Acceleration Chips. In this ... and implement firmware algorithms for power management, thermal control, and performance optimization on ML acceleration hardware - Develop real-time control… more
    Amazon (11/04/25)
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  • Principal AI/ ML Computer Vision Engineer

    TP-Link North America, Inc. (Irvine, CA)
    …perception, and real-time systems. Responsibilities + Define and drive the long-term AI/ ML strategy and vision for smart device perception, edge computing, ... We are seeking for a visionary Principal AI/ ML Computer Vision Engineer to lead the technical...academia and industry. + Influence hardware/software co-design to optimize performance , power efficiency, and cost across multiple… more
    TP-Link North America, Inc. (11/21/25)
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  • Sr. Worldwide Specialist - GenAI/ ML , Data…

    Amazon (San Francisco, CA)
    …Services. You will be working directly with GenAI model providers, Intelligent Device vendors, around model performance evaluations, intelligent on Edge ... enterprises. You have domain expertise in GenAI and key ML use cases, as well as the system/solution development...trust our robust suite of products and services to power their businesses. We're continuously raising our performance… more
    Amazon (01/12/26)
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  • Principal Device Engineer, Technology…

    SanDisk (Milpitas, CA)
    …beating heart of the digital world we're living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations ... our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World… more
    SanDisk (01/03/26)
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  • Staff AI/ ML Computer Vision Engineer

    TP-Link North America, Inc. (Irvine, CA)
    We are seeking for a Staff AI/ ML Computer Vision Engineer to design and develop cutting-edge AI-powered features for our next-generation smart home automation ... edge, and ensuring seamless integration with cloud infrastructure while maximizing performance and efficiency. The ideal candidate combines deep technical expertise… more
    TP-Link North America, Inc. (11/21/25)
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  • Embedded Software Engineer

    Cisco (Milpitas, CA)
    …to join our Diagnostic/BSP team, responsible for ensuring the reliability and performance of our world-class hardware. Our team develops software for Cisco's network ... responses to the diverse workload demands of AI and ML . This is a unique opportunity to grow your...* Design, develop, and test kernel and user space device drivers for FPGA and networking peripherals. * Develop… more
    Cisco (01/07/26)
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  • Senior Software Engineer, AI Platform

    LinkedIn (Mountain View, CA)
    …inference for a large variety of use cases, cuda level optimizations for high performance , enable on- device and online training. Challenges include scale (10s of ... large language models, to computer vision models. We optimize performance across algorithms, AI frameworks, data infra, compute software,...data infra, compute software, and hardware to harness the power of our GPU fleet with thousands of latest… more
    LinkedIn (12/05/25)
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  • Software Engineer, AI Platform

    LinkedIn (Mountain View, CA)
    …inference for a large variety of use cases, cuda level optimizations for high performance , enable on- device and online training. Challenges include scale (10s of ... large language models, to computer vision models. We optimize performance across algorithms, AI frameworks, data infra, compute software,...data infra, compute software, and hardware to harness the power of our GPU fleet with thousands of latest… more
    LinkedIn (10/21/25)
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  • ASIC Engineer Physical Design

    Meta (Sunnyvale, CA)
    …Infrastructure organization to leverage your expertise in ASIC Physical Design, driving high- performance , AI/ ML SoC and IP development from Netlist to GDSII, ... 1. Develop and own physical design implementation of multi-hierarchy low- power and high- performance designs, including physical-aware logic synthesis,… more
    Meta (12/20/25)
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  • Physical Design Engineer, University Graduate, PhD

    Google (Sunnyvale, CA)
    …Collaborate with RTL/Design and Product Development teams to achieve the best Power Performance Area (PPA) possible. This includes conducting feasibility studies ... and practical logic circuits solutions, while evaluating design options with optimized performance , power , and area in mind. The AI and Infrastructure… more
    Google (12/24/25)
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