- Google (Sunnyvale, CA)
- …+ Own PHY Design IP planning and roadmap definition. + Drive pre-silicon integration of PHY Design IPs. + Coordinate PHY Design IP ... or benefits. Learn more about benefits at Google (https://careers.google.com/benefits/) . + Contribute to PHY Design IP selection and procurement process.… more
- Google (Sunnyvale, CA)
- …will drive the selection, integration , and execution of our high speed IO Design Intellectual Propertys ( IP ). In this highly cross-functional role, you ... Physical Design , IP planning, and roadmap definition. + Drive pre-silicon integration of PHY Design IPs. + Coordinate Physical Design IP … more
- Siemens (Fremont, CA)
- …Computer Engineering, or related field . + 10+ years of experience in Ethernet design verification, with proven expertise in Verification IP development . + ... Req ID: 454020 Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to develop… more
- Qualcomm (San Diego, CA)
- …at senior levels with knowledge and experience in Memory (DDR5, LPDDR5/6, HBM3/4) interface IP and systems design . A successful candidate will be involved in ... and roadmap alignment by working with Internal and External IP providers. + PHY /Component models for early...Engineering, or related field and 8+ years of ASIC design , verification, validation, integration , or related work… more
- Qualcomm (San Diego, CA)
- … design , analog circuit design , modeling, controller/subsystem, & SoC integration teams to complete the successful PHY level verification, integration ... scripting languages (Python, or Perl). + Experience with mixed-signal IP design verification, such as USB, PCIe,...Engineering, or related field and 4+ years of ASIC design , verification, validation, integration , or related work… more
- Qualcomm (Santa Clara, CA)
- …degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration , or related work experience. OR Master's ... degree in Science, Engineering, or related field and 3+ years of ASIC design , verification, validation, integration , or related work experience. OR PhD in… more
- Qualcomm (San Diego, CA)
- …degree in Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration , or related work experience. OR Master's ... degree in Science, Engineering, or related field and 5+ years of ASIC design , verification, validation, integration , or related work experience. OR PhD in… more
- Qualcomm (San Diego, CA)
- …conference paper submissions is considered a strong plus + Background in 3GPP protocol standards, design , development, integration and verification, call ... Good knowledge of cellular (5G NR, 5G-Adv, and LTE) PHY /MAC and upper layers. + 5G and LTE Networks'...work experience. **Keywords:** 5G, 5G-A, LTE-A, LTE, 3GPP, NW Design , New technologies/features' trials and Integration , Optimization… more
- SpaceX (Irvine, CA)
- …crossing paths at block and full chip level + Work with mixed signal IP /PLL/SerDes/ PHY teams to drive integration , timing, logical equivalence checking and ... Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design , build, test, and… more
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