• Package Design Engineer

    Google (Sunnyvale, CA)
    …Designer on the Silicon Integration team, your role is to develop package substrate designs of advanced (2.5D/3.5D) packaging technologies for ML chips. This ... Package Design Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid**...experience. + 4 years of experience in chip package substrate design using Cadence APD (Allegro Package Designer) or… more
    Google (12/20/25)
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  • Staff Semiconductor Process Engineer

    Lockheed Martin (Goleta, CA)
    …polishing, substrate removal, or Anti\-Reflection \(AR\) coating or semiconductor packaging techniques\. * Must be a US Citizen, as this position is ... **Description:** You will be a Focal Plane Array Process Engineer with our Infrared Sensors Business on site in Goleta, CA\. Our team is responsible for developing… more
    Lockheed Martin (12/11/25)
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  • IC / Semiconductor Package Designer

    Broadcom (Irvine, CA)
    …Semiconductor Package Designer** **Role Overview** We are seeking an experienced IC Packaging Engineer to drive next-generation package architecture, design, and ... / assembly technologies. **Program Management & Cross-Functional Execution** + Own packaging deliverables from concept through substrate design, development,… more
    Broadcom (12/02/25)
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  • Process engineer

    Applied Materials (Santa Clara, CA)
    …Process Engineer with deep experience in photonics and advanced packaging technologies to support the development of high-performance photonic interconnects and ... go. Learn more about our benefits (https://hrportal.ehr.com/applied/) . As a Process Engineer , you'll play a crucial role in designing and optimizing manufacturing… more
    Applied Materials (10/27/25)
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  • Senior Photonics Test Engineer

    NVIDIA (Santa Clara, CA)
    …on the world. We are seeking a passionate and experienced Senior Photonics Test Engineer who is committed to making a difference in the world through their ... labs and manufacturing sites. + Partner with internal design, fabrication, and packaging multi-functional teams to establish new test requirements, test flows, aid… more
    NVIDIA (12/13/25)
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  • Package Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Package Design Engineer in the Advanced Technology Group (ATG). NVIDIA's GPUs and SOCs are the world leaders in power, performance ... purpose, we are now seeking a passionate Package Design Engineer who is committed to making a difference in...Your responsibilities will include defining the chip pad ring, substrate interconnect scheme, and lead the package layout design… more
    NVIDIA (11/01/25)
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