- Google (Sunnyvale, CA)
- …with EDA tool workflows in a semiconductor environment. + Experience developing automated physical design workflows from RTL to GDS, utilizing Tcl, Python, or ... Perl. + Experience with physical design implementation and convergence at the block and subsystem levels. **Preferred qualifications:** + Master's degree or PhD… more
- Amazon (Cupertino, CA)
- …is possible today. Key job responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud ... infrastructure to support physical design work. - Drive improvement in RTL2GDS flows/...- Proven track record of delivering metric driven PPA flow development and support. Preferred Qualifications - Demonstrated level… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... and efficiencies. Be able to independently troubleshoot digital tool flow usage and deploy solutions; Fluent in scripting languages...MS + 7yrs in EE/CS - 5+ years developing physical design methodology or CAD… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) - PPA Fusion Compiler to ... company. What you will be doing: + Developing Efficient physical design methodologies for implementation of graphics... problems to improve PPA + Participate in developing flow and tool methodologies for P&R, timing analysis and… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) to join our outstanding ... technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics...are needed for NVIDIA chips. + Participate in developing flow and tool methodologies for chip floorplan, power and… more
- NVIDIA (Santa Clara, CA)
- …and SOCs, with emphasis on PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes + Develop flows ... to amplify human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the...cells/memory/IO IP modeling and its usage in the ASIC flow . Hands-on experience in advanced CMOS technologies, design… more
- NVIDIA (Santa Clara, CA)
- …Power Integrity Methodology Engineer. What you'll be doing: + Developing physical design methodologies for rail analysis and signoff. + Responsible for ... Engineering or related field. + Minimum 5+ years of experience in IR/EM/Thermal flow methodology development and support. + Strong understanding of all aspects… more
- Meta (Sunnyvale, CA)
- …nodes 2. Resolve design and flow issues related to the physical design , identify potential solutions, and drive execution 3. Deliver physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure...TCL, Python, Perl or Shell 16. Knowledge of RTL2GDSII flow and design tape-outs in 5nm or… more
- NVIDIA (Santa Clara, CA)
- …diverse team today! The Advanced Technology Group is looking for a highly motivated Principal Physical Design Engineer to join our group. Do you have a proven EE ... background with an in-depth understanding of physical design , place and route, timing analysis,...analysis, IR drop analysis, process nodes and experience of flow development and chip implementation all the way to… more