- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... - BS + 10yrs or MS + 7yrs in EE/CS - 5+ years developing physical design methodology or CAD flows in synthesis, PNR, and sign-off areas for advanced… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC Physical Design Methodology /CAD Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where ... with the ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN METHODOLOGY /CAD ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- Amazon (Cupertino, CA)
- …of machine learning and AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our ... today. Key job responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud infrastructure to… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are seeking an innovative Timing Methodology Engineer to help drive multi-physics sign-off strategies for the ... IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define...for sign-off. + Knowledge of extraction, device physics, STA methodology and EDA tools limitations. + Shown understanding of… more
- NVIDIA (Santa Clara, CA)
- …on the world. We are now looking for a Senior Power Integrity Methodology Engineer . What you'll be doing: + Developing physical design methodologies for ... or related field. + Minimum 5+ years of experience in IR/EM/Thermal flow methodology development and support. + Strong understanding of all aspects of IR/EM/thermal… more
- NVIDIA (Santa Clara, CA)
- …related fields (or equivalent experience). + 8+ years of experience in logic design implementation and/or physical design implementation + Deep understanding ... relative area, timing, and power trade-offs + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, logic… more
- SpaceX (Sunnyvale, CA)
- Sr. Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR. FULL CHIP PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)...integrity, etc.) multi-corner and multimode timing closure, process variations, physical verification methodology and tapeout + Familiar… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure...data-path intensive designs 24. Experience in the 3D-IC technology, methodology , and advanced packaging 25. Experience in validating Power… more