- Qualcomm (San Diego, CA)
- …memory consistency and bus protocol + Multi-core microprocessor architecture + low power design **Keywords** RTL , processor , Verilog, System Verilog, logic ... technologies. The successful candidate will possess detailed understanding of RTL design , synthesis, static timing analysis, formal...design , digital design , processor integration, bus interface, cache. **Minimum… more
- Google (Mountain View, CA)
- …Engineering or equivalent practical experience. + 8 years of experience with digital logic design principles, RTL design concepts, and languages, such as ... low power design . + Knowledge in one of these areas: Processor Cores, Buses/Fabric/NoC, Debug/Trace, Interrupts, Clocks/Reset. + Knowledge of FPGA and emulation… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... . + Contribute to CPU frontend designs, emphasizing on microarchitecture and RTL design for the next generation CPU. + Propose performance… more
- Qualcomm (San Diego, CA)
- …citizen and eligible to receive a US Government security clearance **Role:** As a Design Engineer , you'll play a critical role in shaping cutting-edge digital ... work experience. **Required Qualifications:** + 5+ years of work experience with RTL /FPGA design (Verilog, System verilog), embedded system architecture and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... be doing: + Develop and participate in bleeding edge Processor design in deep submicron technologies. +...common detection circuits is a plus + Experience with RTL , logic synthesis and verification, knowledge of Place and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer . NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... deliver fully verified, high performance, area and power efficient RTL to achieve design targets. + Collaborate...Ways to stand out from the crowd: + Pipeline processor or deep learning accelerator design /architecture experience… more
- Google (Sunnyvale, CA)
- …logic at the Register Transfer Level ( RTL ) using Verilog. + Knowledge of processor design or accelerator designs and mapping Machine Learning (ML) models to ... systems. As a Machine Learning (ML) Hardware Architecture Modeling and Co- design Engineer , you will work with hardware and software architects to model,… more
- quadric.io, Inc (Burlingame, CA)
- … design configurations across multiple process nodes. Responsibilities + Develop Quadric processor IP implementation scripts from RTL to GDS across multiple ... Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing...in chip front-end and back-end implementation tools such as Design Compiler, PrimeTime, ICC2 & Fusion Compiler. + Experience… more
- Amazon (Cupertino, CA)
- …member of the Silicon Optimization Engineering Team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership ... possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test (DFT) architectures * Work with block designers to… more
- quadric.io, Inc (Burlingame, CA)
- …of our chip design team, you will contribute to all stages of the processor design cycle. Requirements + Contribute to the definition of the processor ... by understanding its applications + Own microarchitecture definition & RTL implementation of the processor in SystemC...with a minimum of five years of CPU/GPU/ASIC front-end design + Proficiency in SystemC, SystemVerilog, or Verilog +… more