• RTL Design Engineer…

    Google (Sunnyvale, CA)
    RTL Design Engineer , University Graduate, PhD, Machine Learning _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, ... specific focus on TPU architecture and its integration within AI/ML-driven systems. As an RTL Design Engineer , you will be part of a team developing ASICs to… more
    Google (12/18/25)
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  • ASIC Design Verification Engineer…

    Google (Sunnyvale, CA)
    ASIC Design Verification Engineer , University Graduate _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Early** Experience completing work as directed, ... an emphasis on computer architecture. + Experience in verifying digital logic at RTL using SystemVerilog for ASICs. + Experience in power aware verification, gate… more
    Google (12/17/25)
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