- Eridu Corporation (San Francisco, CA)
- …the first augmented reality contact lens). Responsibilities Provide technical leadership for PCIe microarchitecture and RTL execution, ensuring robust design and ... adherence to performance, power, and area goals. Develop high-performance PCIe buffering, schedulers, and protocol engines. Own RTL development, including… more
- Eridu Corporation (San Francisco, CA)
- A technology startup in San Francisco is seeking a PCIe Lead Engineer to provide technical leadership in microarchitecture and RTL execution. Candidates ... should have an MSEE and over 15 years of ASIC/SoC RTL design experience, specifically in PCIe protocol design. You will develop high-performance PCIe … more
- Quix Recruitment Group Ltd (San Francisco, CA)
- …performance, efficiency, and functionality across complex hardware systems. They are seeking an RTL Design Engineer to join their hardware development team. This ... is critical for translating architectural specifications into robust, synthesizable RTL designs and collaborating across architecture, verification, physical design,… more
- Cerebras (Sunnyvale, CA)
- …GPU-based hyperscale cloud inference services. About The Role As a lead front-end design engineer , you will be a key part of the world-class team designing and ... Scale Engine (WSE). This role requires deep expertise in RTL design and integration, with a strong focus on...stack experience including TCP/IP, RDMA and Ethernet. Knowledge of PCIe , CPU interfaces and Serdes technology. Working knowledge of… more
- SQL Pager LLC (San Jose, CA)
- …SERDES (Serializer/Deserializaer) based protocols, and must possess recent work experience with PCIe Rev.3, 4 and 5 protocol Minimum Qualifications: 1. BSEE / BSCS ... Xilinx Chipscope, Altera Signalscope, Lattice Reveal) 7. Design with RTL coding in Verilog and VHDL is a must...transaction and upper layers of the OSI protocol): a. PCIe Gen3/4/5 12. Experience with the PCI-SIG Compliance Tests… more
- Broadcom Inc. (San Jose, CA)
- A leading semiconductor company in San Jose is seeking a Physical IC Design Engineer to drive next-generation AI and ML ecosystems through PCIe Switch Products. ... This role requires a strong background in Physical Design, including execution of design, verification, and timing closure. The ideal candidate must have a Bachelor's degree in Electrical or Electronics Engineering and at least 8 years of experience. The… more
- FLIR Systems, Inc. (Milpitas, CA)
- Staff Logic Design Engineer page is loaded## Staff Logic Design Engineerlocations: US - Milpitas, CAtime type: Full timeposted on: Posted 3 Days Agojob requisition ... and networking.**Role Overview**We are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, experience, team play, spirit… more
- Liberty Personnel Services, Inc. (Palo Alto, CA)
- Overview Senior RTL /Chip Design Engineer - Architect the Future of AI Hardware Are you ready to push the boundaries of chip design at the cutting edge of ... AI and machine learning techniques Develop, test, and validate high-performance RTL designs that integrate seamlessly into next-gen semiconductor systems Contribute… more
- Kubelt (Alameda, CA)
- …on via Science Foundry. We are seeking a highly skilled and motivated FPGA/Firmware Engineer to join our team and take ownership of architecting and building the ... is ideal for candidates passionate about end-to-end product development, from RTL design to embedded firmware and who thrive in high-ownership, cross-disciplinary… more
- SQL Pager LLC (San Jose, CA)
- Job Description: Define block level micro-architecture and write design specification RTL implementation of the specification while meeting power, area, timing ... field 10 years of industrial experience in ASIC Design Experience in micro-architecture and RTL design of complicated blocks Proficient in RTL design using HDL… more
