- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design - STA Engineer to continue to innovate on behalf of our ... STA and Signoff for a complex, multi-clock, multi-voltage SoC . * Streamlining the timing signoff criterions, timing analysis...& Route and other local/remote teams to address the design challenges in the context of timing sign-off. *… more
- Amazon (Sunnyvale, CA)
- …Blink and Ring camera products. Your team will be responsible for front-end digital design and verification of complex IP and SoC integration. This role provides ... Description As an SoC Manager, you will lead a team responsible...silicon development including RTL simulation, synthesis, front-end timing constraints, STA , LEC, UPF, low-power design flows, floor… more
- Meta (Sunnyvale, CA)
- …tests in C for custom hardware 5. Help create and maintain design documentation including IP/ SoC Micro Architecture document (collaborator/owner), IP/ SoC ... with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs 4....and ASIC architecture 10. Skilled in micro-architecture, RTL coding, design verification and SoC Integration of complex… more
- Meta (Sunnyvale, CA)
- … documentation including IP/ SoC Micro Architecture document (collaborator/owner), IP/ SoC Design plan (collaborator) and SoC /chip bringup/validation ... with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs 4....SPI, UART, etc 20. Familiar with IP, sub-system and SoC Design Verification to execute Design… more
- Amazon (Cupertino, CA)
- …a member of the Silicon Optimization Engineering Team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide ... possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test (DFT) architectures * Work with block designers to… more
- Qualcomm (Santa Clara, CA)
- …As a CPU Floorplan and Integration Engineer, you will work with microarchitecture, RTL design and physical design teams to design , floorplan and integrate ... as full chip floorplanning and power grid planning. + Skilled in physical design , integration, and verification of large processor and system-on-chip ( SoC )… more
- Qualcomm (Santa Clara, CA)
- …+ Proficient in EMIR tools like Redhawk and Voltus + Basic knowledge of physical design flow and standard PnR tools + Experience with TCL, Perl, and Python scripting ... and power integrity. + Skilled in PnR implementation, verification, power analysis, and STA . + Proficient in TCL, Perl, and Python scripting. + Experience with large… more
- NVIDIA (Santa Clara, CA)
- … hardware engineering position. + Previous engineering experience in CPU/GPU/ SOC NPI bringup, with focus on driving methodologies and testplans. Familiarity ... a plus, related to timing, speed, reliability and power. + Familiarity with STA timing closure, circuit design , noise characterization, product binning methods… more
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