- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving ... challenges that require innovation? If so, we may have an opportunity for you. In our team we define and build methodologies, Software, and flows tailored to the field of Silicon device testing, Silicon debug, and Silicon failure analysis. We owe our success… more
- Cisco (San Jose, CA)
- Senior DFx /RTL Engineer Apply...be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with ... protocols, Scan architectures, including memory BIST and boundary scan. + Prior DFX experience (DFT + Debug logic/features) + Prior exposure to LINT/CDC/timing… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx , Physical Implementation, Power Optimization and Ease of timing closure to innovate… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... SoCs at block level, cluster level, and/or full chip level. + Work with PD, DFX , Clocks, and other teams in coming up with timing closure strategy, creating timing… more
- NVIDIA (Santa Clara, CA)
- …designers, software/firmware engineers, HW/SW applications engineering, process/reliability specialists, DFx engineers, ATE engineers, product managers, sales, and ... our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you!… more