- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... complex semiconductor chips. What You'll Be Doing: As a key member of our DFX Methodology Team, you will play a critical role in shaping the architecture, design,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving ... challenges that require innovation? If so, we may have an opportunity for you. In our team we define and build methodologies, Software, and flows tailored to the field of Silicon device testing, Silicon debug, and Silicon failure analysis. We owe our success… more
- Cisco (San Jose, CA)
- Senior DFx /RTL Engineer Apply...be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with ... protocols, Scan architectures, including memory BIST and boundary scan. + Prior DFX experience (DFT + Debug logic/features) + Prior exposure to LINT/CDC/timing… more
- NVIDIA (Santa Clara, CA)
- NVIDIA Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of NVIDIA Networking chips. We're ... design needs to balance high frequency clocks with power, DFx , noise, circuit and physical design constraints. What you...and design next generation clock topologies and modules. + ASIC Clock scheme definition. + Improve Power, Performance, and… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... SoCs at block level, cluster level, and/or full chip level. + Work with PD, DFX , Clocks, and other teams in coming up with timing closure strategy, creating timing… more