• Senior DFx / RTL…

    Cisco (San Jose, CA)
    Senior DFx / RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US + Area of InterestEngineer - ... Jose, CA with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT… more
    Cisco (07/22/25)
    - Related Jobs

  • Senior ASIC Design Engineer…

    NVIDIA (Santa Clara, CA)
    …the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and ... and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx , Physical Implementation, Power Optimization and Ease of timing closure to innovate… more
    NVIDIA (07/29/25)
    - Related Jobs

  • Senior DFT Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …human imagination and intelligence. Make the choice to join us today. DFX Methodology Group at NVIDIA works on groundbreaking innovations involving crafting creative ... 2+ years of experience in DFT, system architecture, or RTL design. + Understanding of fundamental DFT topics, such...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
    NVIDIA (07/01/25)
    - Related Jobs

  • Senior DFT Engineer

    NVIDIA (Santa Clara, CA)
    …to join us today. NVIDIA's DFX team is looking for an exceptional DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test ... and prototyping breakthrough Test Architectures for reticle sized, multi-chiplet products-from RTL to verification to post-silicon ATE bring-up. Join a globally… more
    NVIDIA (06/17/25)
    - Related Jobs