- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! For two decades, NVIDIA has pioneered visual computing, the ... Doing: + You will be working on architecture and design of our state-of-the-art high speed coherent ...BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual ... sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will verify the design...design and implementation of our innovative high speed coherent interconnects for our mobile SoCs and GPUs. This… more
- Chenega Corporation (Vandenberg AFB, CA)
- RF Engineer , Senior (Radar) Vandenberg SFB, CA Join our Talent Network RF Engineer , Senior (Radar) Req ID: 31621 This position is located at Vandenberg ... Chenega company, has an excellent opportunity for an RF Engineer , Senior (Radar). This individual will perform... (Radar). This individual will perform engineering functions to design , develop, modify, integrate, and test new subsystems on… more
- Google (Sunnyvale, CA)
- …intelligent search experiences to boost the productivity and efficiency of Googlers. As a Senior Staff Software Engineer , you will explore Gemini models early in ... software products. + 3 years of experience with software design and architecture. + Experience with machine learning, AI,...on and is growing every day. As a software engineer , you will work on a specific project critical… more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- Senior High Performance Computing Engineer Job ID 6383 Location SLAC - Menlo Park, CA Full-Time Regular **SLAC Job Postings** **About SLAC:** The SLAC National ... is home to groundbreaking facilities such as the Linac Coherent Light Source - which generates incredibly brief bursts...on-site and hybrid work options.** **Position Overview:** As a Senior High Performance Computing Engineer in the… more
- Craig Technologies (Lompoc, CA)
- Title: RF Engineer Senior (Radar) Location: VSFB, CA Clearance: Active Secret Clearance Required Citizenship Requirement: Yes Req #: 3842 (SN117 / RW252) Salary: ... In this position, you will perform engineering functions to design , develop, modify, integrate and test new subsystems on...+ Experience with C-band pulsed Doppler tracking and wideband coherent imaging systems desired + Familiar with legacy range… more
- Google (Sunnyvale, CA)
- …of experience testing, maintaining, or launching software products, along with software design and architecture. + 5 years of experience in a technical leadership ... all areas, including information retrieval, distributed computing, large-scale system design , networking and data storage, security, artificial intelligence, natural… more
- Google (Sunnyvale, CA)
- …or launching software products, and 1 year of experience with software design and architecture. + 3 years of experience developing large-scale infrastructure, ... all areas, including information retrieval, distributed computing, large-scale system design , networking and data storage, security, artificial intelligence, natural… more
- Google (Sunnyvale, CA)
- …1 year of experience in technical leadership. + Experience with digital coherent optical transmission systems. + Knowledge of large volume high-speed optical ... transceiver designs and manufacturing. + Knowledge of high speed design of electronics and optics. The Platforms Optics team works with networking and machine… more
- Verint Systems, Inc. (Sacramento, CA)
- …growth opportunities. Learn more at www.verint.com **Overview of Job Function:** Verint's Senior Software Engineer is responsible for all aspects of the ... highly skilled hands-on role. Subject to their specialization, this Senior Software Engineer is involved in all...Technical Architect and Lead to define, document, and communicate coherent feature design + Communicate relevant risks… more
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