- Amazon (Sunnyvale, CA)
- …Neural Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf ... plan for sub-systems and the full chip. You will participate in the design verification and bring-up of the chip and subsystems by writing relevant assertions,… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This ... voltage regulation and silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced … more
- BAE Systems (San Diego, CA)
- …be available based on position level and/or job specifics. ** Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **113449BR** EEO ... your skills, and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop … more
- Amazon (Sunnyvale, CA)
- Description As a Design Verification (DV) Engineer , you will be part of an advanced architecture team that is exploring new hardware designs to improve our ... test plan for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging… more
- Amazon (Sunnyvale, CA)
- …Fire tablets, Fire TV and Amazon Echo. What will you help us create? As a Sr. Design Verification Engineer at Amazon, you will be part of an advanced ... members across multiple disciplines - Deliver detailed test plans for verification of complex digital design blocks by working with design engineers and… more
- quadric.io, Inc (Burlingame, CA)
- …progress on verification Requirements + At least 5 years of experience in design verification for CPU or GPUs. + Deep knowledge of leading verification ... Collaborate with architects, HW & SW designers to document verification test plans + Implement testbenches using commercial VIPs...drivers, assembly or C++ programs to efficiently test the design + Use coverage metrics to track and communicate… more
- Qualcomm (San Diego, CA)
- …responsibility for the development of test plans and the functional verification on hardware at the IP, sub-system, SoC and system/architecture level ... for wireless and wired technologies using an object-oriented verification language called SystemVerilog in an OVM or UVM...test plan targets. Acts as a strong contributor at design reviews and project meetings. Will accept a Master's… more
- Qualcomm (San Diego, CA)
- …develop solutions that meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip ... to help create a smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you will plan, design , optimize, verify,… more
- Palo Alto Networks (Santa Clara, CA)
- …is to create an environment where we all win with precision. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ... experience required - MSEE preferred + Minimum 7 years experience in ASIC design verification + Demonstrated success in taking ASIC products to mass production +… more
- Broadcom (San Jose, CA)
- …you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you will be ... Electrical Engineering or Computer Engineering with 6+ years of experience in digital design verification + Hands on experience in SV UVM, SV RNM and … more
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