• Senior Emulation Power

    NVIDIA (Santa Clara, CA)
    We are looking for a Senior Emulation Power Engineer ! NVIDIA prides in having energy efficient products. We believe that continuing to maintain our ... power consumption of NVIDIA GPUs. As a member of the Emulation Power Team, you will collaborate with Architects, Performance Engineers, Software Engineers,… more
    NVIDIA (05/15/25)
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  • Senior Emulation Engineer

    Cisco (San Jose, CA)
    …our customers build multitenant clouds. What you'll do: * Develop state-of-the-art emulation environments that will be used to evaluate the performance and ... functionality of multi-terabit systems. * Developing emulation infrastructure using C/C++ and TCL * As a...a team member, work closely with the design, DV, power , and post-silicon diagnostic teams. * Assist with test… more
    Cisco (04/18/25)
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  • Senior System Verification Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for a Senior System Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking ... latest emulation techniques (C/C++ DPI Transactors, SV assertions, Coverage, Power Estimation, SpeedBridges, Accelerated UVM Testbenches). + Bring up GPUs, SOCs,… more
    NVIDIA (03/18/25)
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  • Sr. Staff Design Engineer (Low Power

    Qualcomm (Santa Clara, CA)
    …team you will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/Implementation, power estimates and power ... specifications from Architectural and systems requirements and deliver detailed low power micro-architecture and design. Also work closely with verification team to… more
    Qualcomm (04/09/25)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + Architecture and ... Development, assessment and refinement of RTL design to target power , performance, area and timing goals + Write design...Ensure robust design and complete coverage + Work with Emulation teams to test the design on various … more
    Tarana Wireless (05/01/25)
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  • Senior ASIC Design Engineer (NetSec)

    Palo Alto Networks (Santa Clara, CA)
    …- just to name a few! At Palo Alto Networks, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full ... all win with precision. **Your Career** As a Design engineer on the ASIC team, you will create complex...and validate the designs on diverse platforms including simulation, emulation , formal verification, and silicon validation. **Your Impact** +… more
    Palo Alto Networks (03/19/25)
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  • Senior ASIC Design Engineer - Memory…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... need to see: + BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD) a plus. + 5+ years… more
    NVIDIA (04/05/25)
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  • Senior SoC Architectural Modeling…

    Amazon (Cupertino, CA)
    …custom-designed accelerator SoCs for use by AWS internal teams. We're looking for a Senior SoC Modeling Engineer to join the team and deliver new functional ... testing, and debug - Work closely with architecture, RTL design, design verification, emulation , and software teams to build, debug, and deploy your models -… more
    Amazon (05/14/25)
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  • Senior Engineer

    Qualcomm (Santa Clara, CA)
    …the micro-architecture discussion for it with a particular focus on meeting aggressive power and area targets. You will work with engineers to develop and deliver ... experience in Digital Signal processing + ASIC frontend development for low power applications + Hardware description languages (Verilog, SystemVerilog) + AMBA bus… more
    Qualcomm (04/22/25)
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  • Senior ASIC Design Engineer

    Cisco (San Jose, CA)
    …in reviews. * Implement Verilog RTL to meet timing, performance, and power requirements. * Contribute to full chip integration and timing methodology/analysis. * ... programming) * Experience with formal verification tools * Experience with emulation #WeAreCisco #WeAreCisco where every individual brings their unique skills and… more
    Cisco (05/02/25)
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