• Senior FPGA / Rtl…

    Silvus Technologies (Irvine, CA)
    …that creates a pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA / RTL Design Engineer_** reporting to the _Director of ... exciting projects targeted to address challenging real-world communication needs. The _Senior FPGA / RTL Design Engineer_ position will be based at Silvus… more
    Silvus Technologies (10/04/25)
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  • Principal FPGA / Rtl Design…

    Silvus Technologies (Irvine, CA)
    …a pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Principal FPGA / RTL Design Engineer_** who will report to the _Senior ... exciting projects aimed at addressing challenging real-world communication needs. The _Principal FPGA / RTL Design Engineer_ position will be based at Silvus… more
    Silvus Technologies (10/04/25)
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  • Principal FPGA / Rtl Design…

    Silvus Technologies (Irvine, CA)
    …THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work ... exciting projects aimed at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus'… more
    Silvus Technologies (10/03/25)
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  • Senior FPGA Prototyping Engineer…

    NVIDIA (Santa Clara, CA)
    …Santa Clara, CA. What you'll be doing: + Build FPGA prototypes by making RTL FPGA -friendly, partitioning the design and taking it through synthesis and ... prototyping platforms. We are now looking for a Senior FPGA Prototyping Engineer to join our...timing and generate bit streams. + Bring up the design on FPGA prototyping platforms and indulge… more
    NVIDIA (09/09/25)
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  • Sr. FPGA Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    …Experience working with complex digital designs + Experience in different stages of FPGA development: RTL design , verification, synthesis, timing analysis, ... for versatile, driven, and collaborative engineers. As an Sr. FPGA engineer on the satellite digital design ...+ Implement logic designs and signals processing algorithms in RTL + Integrate designs onto FPGA /SoC platforms… more
    SpaceX (09/30/25)
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  • DSP or Serdes RTL Sr Principal Digital…

    Cadence Design Systems, Inc. (San Jose, CA)
    …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + Strong background in ... and developing flows at all phases of the digital design and functional verification. It is further expected that...the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered. Position… more
    Cadence Design Systems, Inc. (07/18/25)
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  • Senior ASIC Design Engineer…

    Arrow Electronics (San Jose, CA)
    …Doing:** + Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA ... our prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP...or a related discipline. + A comprehensive understanding of ** FPGA design ** , with proven expertise in… more
    Arrow Electronics (09/10/25)
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  • Senior Digital Design Engineer

    BrainChip, Inc. (Laguna Hills, CA)
    BrainChip is seeking a Senior Digital Design Engineer to join a team working on cutting-edge and novel AI hardware. The primary job function is to work with team ... gather the relevant information, and develop a solution. Use RTL language to design the digital functional...tools to check the functionalities of the designs in RTL and gate level. Collaborate with other… more
    BrainChip, Inc. (09/11/25)
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  • Senior Design Verification Engineer,…

    Amazon (Sunnyvale, CA)
    …Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our ... and the full chip. You will participate in the design verification and bring-up of the chip and subsystems...in the lab bring-up of these blocks either in FPGA , emulation, or silicon by potentially writing test scripts,… more
    Amazon (09/04/25)
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  • Senior Applications Engineer - DDR…

    Cadence Design Systems, Inc. (San Jose, CA)
    …subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA design * Knowledge of ... to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob...opportunities* Run Verilog simulations to enable IP benchmarking* Run RTL synthesis for area and timing analysis* Present IP… more
    Cadence Design Systems, Inc. (10/04/25)
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