• Senior Memory Controller…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem IP verification Team! At NVIDIA, we ... crowd: + Strong C/C++ programming experience + Prior Design or Verification experience of dynamic memory controllers (ddr{2, 3, 4, 5}, lpddr{2, 3,4,5, 6}) +… more
    NVIDIA (10/02/25)
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  • Senior Applications Engineer - DDR Design…

    Cadence Design Systems, Inc. (San Jose, CA)
    …devices.Responsibilities include:* Technical presales of Memory IP* Gain expertise in memory controller and PHY IPs and DDR protocols* Work closely with ... - DDR4/5, LPDDR4/5/5X, HBM2/3, GDDR6* Perl/Python Scripts* Experience on memory subsystem verification and/or performance analysis* Strong...design* Knowledge of AXI, DFI protocols* Working knowledge of memory controller and memory PHY… more
    Cadence Design Systems, Inc. (10/11/25)
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  • Systems Engineer Modem Design

    General Atomics (Poway, CA)
    …+ Support the development of test plans and manage the integration, verification , and validation of systems through flight test. + Troubleshoot conflicting ... oscilloscopes. + Knowledge of computer equipment including interfaces, processors, memory , graphics processing, and field programmable gate assemblies (FPGAs) with… more
    General Atomics (09/25/25)
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