- Arm Limited (San Diego, CA)
- …The role involves developing innovative software for SoCs, optimizing performance, and collaborating with cross-functional teams. Ideal candidates have a strong ... background in software development for SoC platforms, as well as experience in Linux environments. The position offers a competitive salary range and the flexibility of hybrid working. #J-18808-Ljbffr more
- Arm Limited (San Diego, CA)
- …solutions. Ideal candidates should have strong Python or C++ skills, experience with power analysis , and excellent problem-solving abilities. This role offers a ... A semiconductor company is looking for an experienced engineer to join their Power Attainment team in San Diego. The role involves developing power models and… more
- Arm Limited (San Diego, CA)
- …innovative Software applications for Arm SoCs to be used as workloads for power analysis in modelling, simulation, emulation and silicon platforms. Developing ... analysing CPU, machine Leaning, media, and memory system benchmarks used for PPA analysis . Background in running simulation/emulation tools. (eg VCS, Questasim,… more
- Arm Limited (San Diego, CA)
- …experienced engineers for a multi‑disciplinary role. Ideal candidates have experience in power analysis , modeling or are motivated engineers with valuable ... GitLab CI) Knowledge of database design and management (SQL/NoSQL) Familiarity with power estimation and analysis tools (eg, PowerArtist, PrimePower, PowerPro,… more
- NVIDIA Corporation (Santa Clara, CA)
- …perspective across the field of CPU/GPU architecture and depth in the area of PPA analysis is highly desirable. This position offers the opportunity to have ... Senior GPU Memory Architect page is loaded## ...ensure robust feature integration.* Analyze benchmarks, application workloads, and performance/ power simulation and emulation results to identify areas for… more
- Google Inc. (Sunnyvale, CA)
- …with internal logic and internal and external teams to achieve the best Power /Performance Analysis ( PPA ). This includes conducting feasibility studies for ... on Physical Design (PD) closure. Experience in Static Timing Analysis (STA), with an understanding of how to define...DFT including Scan, MBIST and LBIST. Understanding of performance, power and area ( PPA ) trade-offs. About the… more
- Credo Semiconductor, Inc. (San Jose, CA)
- …IP, and block-level physical implementation from RTL to GDSII. Focus on timing, power , and area ( PPA ) optimization for high-speed SerDes and interconnect ... at Credo, We Connect. About the Role As a Senior Physical Design Engineer, you will manage all aspects...chip assembly, P&R, and timing closure. Perform static timing analysis , power and noise analysis ,… more
- Qualcomm (San Diego, CA)
- …benchmarks. Work closely with design/arch/model teams on GPU pipeline bottleneck analysis and propose hw/sw optimizations to improve PPA . Contribute ... you may architect, design, implement, verify, and/or optimize the performance and power of GPU cores. Qualcomm Engineers collaborate with cross-functional teams to… more
- Advanced Micro Devices (Santa Clara, CA)
- …ROLE AMD is looking for an engineering leader passionate about driving the best Power , Performance, Area ( PPA ) of AMD's SoC coherent Interconnects Data Fabrics ... SOC microarchitectures. Expert level ability in optimizing and performing tradeoff analysis across multiple domains including PPA , design, microarchitecture, and… more
- TSMC - Taiwan Semiconductor Manufacturing Company Limited (San Jose, CA)
- …frequent executive‑level alignment with TSMC. Serve as a trusted advisor on Performance, Power , Area ( PPA ), Production Part Approval Process (PPAP), and ongoing ... business analysis and briefings for Account Directors, VPs, and senior TSMC executives. Candidate Profile Minimum Qualifications MS in Engineering related field… more
