• Silicon Formal Verification

    Google (Mountain View, CA)
    Silicon Formal Verification Engineer _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, and ... or equivalent practical experience. + 4 years of experience with formal verification for Application-Specific Integrated Circuits (ASICs) or Field-Programmable… more
    Google (10/23/25)
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  • ASIC Engineer , Formal

    Meta (Sacramento, CA)
    …towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical leadership ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in … more
    Meta (10/20/25)
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  • Silicon Verification Engineer

    ManpowerGroup (Mountain View, CA)
    Our client, a leader in technology innovation, is seeking a Silicon Verification Engineer to join their team. As a Silicon Verification Engineer , ... which will align successfully in the organization. **Job Title:** Silicon Verification Engineer **Location:** Mountain...on verifying the design of the ASIC/SoC using simulation, formal verification , and emulation. + Utilize tools… more
    ManpowerGroup (08/20/25)
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  • Senior Design Verification Engineer

    Google (Mountain View, CA)
    Senior Design Verification Engineer , Silicon _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving problems, ... with an emphasis on computer architecture. + Experience in different verification techniques and methodologies including formal , Gate-Level Simulation, Unified… more
    Google (10/16/25)
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  • ASIC/SOC DFT Engineer ( Silicon

    SpaceX (Sunnyvale, CA)
    …of design blocks using Verilog/SystemVerilog + Familiar with UPF (unified power format), formal verification , and DRC rule checking experience + Ability to work ... ASIC/SOC DFT Engineer ( Silicon Engineering) Sunnyvale, CA Apply...weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per year… more
    SpaceX (09/18/25)
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  • Senior Formal Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for Formal Verification Engineer to help verify the design and implementation of industry's leading CPUs and other High Performance ... Computing Solutions. As a Formal Verification Engineer , you will...proofs while working with architects, designers, and pre- & post- silicon verification teams to accomplish your tasks.… more
    NVIDIA (10/16/25)
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  • Principal Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    verification environments in industry standard languages like SVTB UVM or formal verification . **Other** **Requirements** **:** Ability to meet Microsoft, ... and every two years thereafter. **Preferred Qualifications:** + 2+ years of pre- silicon verification technical leadership, including leading a team, technical… more
    Microsoft Corporation (10/16/25)
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  • Staff ASIC Design Verification

    Google (Mountain View, CA)
    Staff ASIC Design Verification Engineer , Platforms and Devices _corporate_fare_ Google _place_ Mountain View, CA, USA **Advanced** Experience owning outcomes and ... emphasis on computer architecture. + 12 years of experience with building verification methodologies that span simulation, formal , emulation and FPGA… more
    Google (10/01/25)
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  • Senior Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …will manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** The role will be ... SoCs or systems. + 2+ years of experience leading pre- silicon verification of blocks and sub systems...with PCIe subsystems + Experience with the use of formal verification methods + Experience in RTL… more
    Microsoft Corporation (10/21/25)
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  • ASIC Engineer , Network Design…

    Meta (Sunnyvale, CA)
    …towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Network Design Verification Responsibilities: 1. Define and implement ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....or more of the following areas along with functional verification -SV Assertions, Formal , Emulation 12. Experience in… more
    Meta (09/30/25)
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