- Google (Sunnyvale, CA)
- SoC Silicon Top - Level Floorplan Engineer _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Advanced** Experience owning outcomes and decision making, ... + Own the planning, creation, and delivery of top - level floorplan deliverables and implementation for Silicon SOC projects from concept to working … more
- SpaceX (Sunnyvale, CA)
- …will expand the performance and capabilities of the Starlink network. RESPONSIBILITIES: + Perform SOC top level physical design; floor-planning, I/O, bump & ... Sr. Full Chip Physical Design Engineer ( Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded...SKILLS AND EXPERIENCE: + Experience and deep understanding of SOC top level physical design… more
- NVIDIA (Santa Clara, CA)
- …and working with memory systems in the lab. + Direct experience in taking an SOC /GPU from concept level to production. + Experience in DRAM, high speed DRAM ... We are seeking Lead Post- Silicon Validation Engineer within the GPU Engineering Team...initial power-on through production. + Ability to understand the Top N issues in a myriad of data. +… more
- Amazon (Cupertino, CA)
- …the servers they power. Our models are used by AWS internal teams for silicon verification and to left-shift software development (as a virtual platform). We are ... you will: * Lead the team responsible for developing SoC models end-to-end, including model architecture, integration with other...debug * Mentor and develop the team, while hiring top talent to continue scaling * Lead new product… more
- SpaceX (Irvine, CA)
- …Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level and deliver the fully verified, synthesis/timing clean design ... Sr. ASIC Design Engineer ( Silicon Engineering) Irvine, CA Apply SpaceX was founded...problems including clock domain crossings and power optimization + ASIC/ SoC system integration experience + Experience with multicore CPU… more
- Broadcom (San Jose, CA)
- …and memory. + ARM-based SoC Architecture: Define and drive the top - level architecture for complex SoCs utilizing various ARM processor cores (Cortex-M, ... This role is central to bridging the gap between system requirements and silicon implementation, with a strong focus on mixed-signal integration for sensing and… more
- Google (San Diego, CA)
- …Requirement Documents (PRDs). + Collaborate with Pixel and Android partners to identify top use cases and metrics driving silicon requirements. + Partner with ... Senior Product Manager, Tensor SoC _corporate_fare_ Google _place_ Mountain View, CA, USA;...+ benefits. Our salary ranges are determined by role, level , and location. Within the range, individual pay is… more
- Cisco (San Jose, CA)
- …silicon failure analysis (FA) on ATE and CFT to replicate and diagnose system- level failures, applying silicon debug tools to isolate issues. + Collaborate ... along with 5+ years' experience in IC test engineering, SOC /VLSI test bring-up, characterization and production testing. + Strong...experience in silicon test debug, root causing silicon failures to flop or cell level .… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top -notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... efficient clock programming sequence. The team works with the silicon solution team to triage silicon or...we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. + Get… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …related to memory protocols such as DDR, LPDDR, HBM, and GDDR, and to engage with top technology companies making an impact in our world. We are seeking a Post ... Silicon Memory Product Engineer to support silicon ...and debug of Memory IP subsystems. + Support customer SOC and system integration, including ATE deployment and production… more