• Software Engineer , Place…

    Cadence Design Systems, Inc. (San Jose, CA)
    …on the world of technology. Cadence Design Systems is looking for a highly motivated software or digital IC design engineer to work with the Innovus routing team ... and Tcl scripting is preferred + Experience in P&R software tool usage is a plus + Excellent programming...tool usage is a plus + Excellent programming and software engineering skills + Experience with UNIX and/or LINUX… more
    Cadence Design Systems, Inc. (06/07/25)
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  • Principal C++ Software Engineer…

    Cadence Design Systems, Inc. (San Jose, CA)
    …our customers, our communities, and each other-every day. Role As a Principal C++ Software Engineer , you will: + Innovate and develop cutting-edge solutions to ... 1 year of related experience. + Experience with EDA applications such as synthesis, place and route , timing, and optimizations. + Strong programming skills in… more
    Cadence Design Systems, Inc. (07/09/25)
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  • Sr. Staff Software Engineer , AI…

    LinkedIn (Mountain View, CA)
    …for the kernel development lifecycle (including but not limited to synthesis, place -and- route , timing analysis, validation and verification) and deploy them on ... optimize performance across algorithms, AI frameworks, data infra, compute software , and hardware. In this role, you will be...the large scale AI models. As a Sr. Staff Engineer on the AI Infra team, you will play… more
    LinkedIn (07/18/25)
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  • Sr. Staff CPU Physical Design CAD Engineer

    Qualcomm (Santa Clara, CA)
    …+ Develop, integrate and release new features in our high-performance place -and- route CAD flow + Architect and recommend methodology improvements ... energy efficiency and scalability. As CPU Physical Design CAD engineer , you will build and support the world's best...Computer Science + Ten+ years of hands-on experience in place -and- route of high-performance chips - either in… more
    Qualcomm (07/08/25)
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  • Lead Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …with Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design-for-Test (DFT), Place & Route and Static Timing Analysis (STA).You may get ... design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System...Checking + Low Power Design Implementation, SDC Verification + Place and Route + Parasitic Extraction, Timing… more
    Cadence Design Systems, Inc. (07/18/25)
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  • CPU Server Floorplan and Integration…

    Qualcomm (Santa Clara, CA)
    …using industry standard tools/flows. Ideal candidate should have + Proficiency in synthesis, place and route , and signoff timing/power analysis. + Expertise in ... the server product. As a CPU Floorplan and Integration Engineer , you will work with microarchitecture, RTL design and...plus + Solid understanding industry standard tools for synthesis, place & route and tapeout flows. Roles… more
    Qualcomm (07/23/25)
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  • Senior Applications Engineer (Aprisa)

    Siemens (San Diego, CA)
    Job Family: Software Req ID: 468177 Siemens EDA is a global...is looking for an experienced Place & Route user or Applications Engineer to play a ... technology leader in electronic design automation software . Our software tools enable companies around...the industry's rapidly expanding interest in Aprisa, the Siemens Place & Route offering. Since the acquisition… more
    Siemens (06/19/25)
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  • CPU Physical Design Pathfinding Engineer

    Qualcomm (San Diego, CA)
    …Power, Area and Performance goals. Must have skill/experience + Experience with Synthesis, place and route and signoff timing/power analysis. + Knowledge of high ... CPU Engineering **General Summary:** As a CPU PPA Pathfinding Engineer , you will work with Architecture, RTL, Physical Design,...optimizations. + Solid understanding of industry-standard tools for synthesis, place & route , and tapeout flows. +… more
    Qualcomm (07/03/25)
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  • Senior Physical Design Applications…

    Cadence Design Systems, Inc. (San Jose, CA)
    …teams solve problems. We are seeking individuals with experience in Digital Synthesis, Place and Route and Signoff Analysis. Where is this returnship located: ... to re-enter the workforce as a Physical Design Application Engineer after taking a career break for caregiving? Who...in the Application Engineering field spanning across Digital Synthesis, Place and Route and Signoff Analysis. How… more
    Cadence Design Systems, Inc. (07/02/25)
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  • Lead Product Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …chip design platforms. As Product Engineer , you will be a source of technical place and route expertise to Cadence customers and to R&D. You are a motivated ... world of technology. This opportunity is for a Product Engineer in the Digital and Signoff Group (DSG) at...influence the development of software tools for advanced… more
    Cadence Design Systems, Inc. (05/21/25)
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