• Sr . IC Layout

    SpaceX (Sunnyvale, CA)
    Sr . IC Layout Engineer (Starlink) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. SR . IC LAYOUT ENGINEER...meet critical milestones COMPENSATION AND BENEFITS: Pay range: Silicon Engineer / Senior : $140,000.00 - $190,000.00/per year Your actual… more
    SpaceX (04/15/25)
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  • Sr . Staff IC CAD Engineer

    Power Integrations (San Jose, CA)
    …software installation, license management, user support and vendor interface. + Works with IC layout designers providing support for taping out physical designs ... and power density. We are seeking a highly motivated Sr . Staff CAD Engineer to join our...Responsibilities + Develops and maintains PDKs. + Supports all IC design CAD tools such as Cadence schematic entry,… more
    Power Integrations (04/16/25)
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  • Sr . IC Packaging Design…

    Amazon (San Diego, CA)
    …unserved and underserved communities around the world. The Role: As Senior IC Packaging Manufacturing and Reliability Engineer , you will engage with an ... experienced cross-disciplinary staff to conceive and deliver innovative product IC package solutions. You will work closely with an...the antenna, EE and mechanical teams to design and layout test vehicles and application PCBs for your packages… more
    Amazon (04/25/25)
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  • Sr . Staff IC Package Design…

    Qualcomm (San Diego, CA)
    …process Experience in package design, design for manufacturing review + Familiar with layout review tools such as Valor or Calibre + Experience preferred in ... schematic capture, layout and design using Cadence Allegro Schematic Design Entry (Concept HDL) design tools is a plus + Excellent communication and organizational… more
    Qualcomm (04/23/25)
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  • Senior Analog Mixed Signal IC Design…

    Teledyne (Camarillo, CA)
    …Teledyne Imaging Sensors is looking for a ** Senior Analog Mixed Signal IC Design engineer ** responsible for supporting the Read Out Integrated Circuit (ROIC) ... with CMOS semiconductor IC design including performing full custom analog IC layout . + Thorough understanding of deep sub-micron layout design practices… more
    Teledyne (04/29/25)
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  • Photonic IC Design Engineer

    Applied Materials (Santa Clara, CA)
    …integrated products of the connectivity solutions for Applied Materials. It is a senior engineer that initiates initial blueprints of the products & solutions ... to learn more about careers at Applied. The Photonic IC Design Engineer is responsible for the...optical) for high speed architectures. + Create schematics and layout circuits. + Work with test and firmware engineering… more
    Applied Materials (03/13/25)
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  • Senior Analog Layout Engineer

    Capgemini (San Jose, CA)
    **Job description:** ** Senior Analog Layout Engineer ** will be responsible for layout of high-performance analog cores such as analog-to-digital ... converters, digital-to-analog converters, PLL, transceivers, etc. Responsibilities include leading IC layout of cutting-edge high-performance, high-speed CMOS… more
    Capgemini (04/18/25)
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  • Senior Package Layout

    NVIDIA (Santa Clara, CA)
    …in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in ... different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams… more
    NVIDIA (04/18/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    …human creativity and intelligence. We would love to hear from you! We are looking for a Senior Mask Layout Design Engineer , someone who is excited to join a ... of artificial intelligence. What you'll be doing: + Lead and implement IC physical layout for mixed-signal functions like high speed SerDes, Analog to Digital &… more
    NVIDIA (03/06/25)
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  • Senior Failure Analysis Engineer

    Power Integrations (San Jose, CA)
    …communication will be given special consideration. + Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar ... Job Description: The Senior Failure Analysis Engineer will perform...Perform fault isolation and defect analysis/ characterization on power IC 's to identify root causes of product failures in… more
    Power Integrations (04/08/25)
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