• DSP or Serdes RTL Sr Principal Digital…

    Cadence Design Systems, Inc. (San Jose, CA)
    …to accurately and efficiently collaborate with all members of the technical staff , both analog and digital, regarding overall project development progress and ... limited to: + Digital microarchitecture definition and documentation + RTL logic design, debug and functional verification + Strong...plus. + Familiar with the PMA/PMD/PCS layers of the Ethernet protocol is a plus. + Understanding of digital… more
    Cadence Design Systems, Inc. (10/17/25)
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  • Staff Logic Design Engineer

    Teledyne (Milpitas, CA)
    …centers, AI/ML, storage, and networking. **Role Overview** We are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, ... measurement products. Join our high-speed Protocol Team as a ** Staff ** **Logic Design Engineer ** , where you'll...that decode and analyze High speed protocols (PCIe, USB, Ethernet etc.) in real time, collaborating with cross-functional teams… more
    Teledyne (11/18/25)
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  • FPGA Senior Design Engineer

    Cisco (Milpitas, CA)
    …We are seeking a highly experienced and accomplished FPGA Senior Design Engineer to provide technical leadership and deep expertise in the architecture, design, ... FPGA development process for critical, next-generation products, mentor junior staff , and drive key architectural decisions across cross-functional teams. +… more
    Cisco (01/07/26)
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