- Actalent (Houston, TX)
- Job Title: FPGA UVM Verification Engineer Job Description We are seeking a skilled FPGA UVM Verification Engineer with a strong experience in networking ... all functional requirements are met. + Create and maintain UVM -based test benches to verify FPGA designs. + Perform simulation, debugging, and analysis of … more
- Lockheed Martin (Grand Prairie, TX)
- …Experience with Microchip \(MicroSemi\)and Libero SoC Design toolsets \- Familiarity with FPGA Vivado/Vitis toolsets \- Experience with UVM \- Experience working ... verification, validation, integration & test\) \- Expert programming Field Programmable Gate Arrays \( FPGA \) or Complex Programmable Logic Devices \(CPLD\)… more
- Amazon (Austin, TX)
- …VHDL - 3+ years of experiences in testbench development and debugging using SystemVerilog/ UVM - Experience of FPGA development tools (AMD Vivado, Altera/Intel ... in AWS data centers globally. We're looking for a FPGA development engineer with a focus on building accelerator...with a focus on building accelerator services. As a FPGA Development Engineer, you will be responsible for delivering… more
- Meta (Austin, TX)
- …or equivalent practical experience. 9. 10+ years of hands-on experience in SystemVerilog/ UVM methodology and C/C++ based verification. 10. 10+ years of experience in ... IP/sub-system and/or SoC level verification based on SystemVerilog UVM /OVM based methodologies. 11. Experience in one or more of the following areas along with… more
- Qualcomm (Austin, TX)
- …+ Creates and maintains verification test benches and environments in System Verilog/ UVM + Create and leverage advanced testing frameworks to generate and recreate ... Test planning, Scripting, Simulation, problem solving and debug. + System Verilog, UVM , Verilog or VHDL, C/C++ skills required. + Constrained random, Functional… more
- IBM (Houston, TX)
- …fast, focused verification engineers to adjust with the changing environment of the FPGA world while following best practices for high quality and sustainable code. ... Creatively solve verification requirements with the right tool ie UVM bench, System Verilog bench or lab testing with...Verilog. * A minimum of 8 years with writing UVM test benches and verifying coverage. * Demonstrated communication… more
- Amazon (Austin, TX)
- …C/C++ and scripting (Python or TCL) - 6+ years experience in System Verilog or UVM Preferred Qualifications - Master's or PH.D in Computer Engineering - 8+ years of ... processing. - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - Strong written and verbal skills Amazon is an equal… more
- SpaceX (Bastrop, TX)
- …capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block and system level + Write and review test ... or computer engineering + Experience with verification methodologies such as UVM /OVM/VMM + Strong object-oriented programming knowledge + Strong problem-solving and… more
- Meta (Austin, TX)
- …chip validation and chip life until production maturity. 5. Work with FPGA /Emulation engineers to perform early prototyping. 6. Support hand-off and integration of ... 15. Experience with HLS flow for data path implementation. 16. SystemVerilog OVM/ UVM experience. 17. Experience in SoC integration and ASIC architecture. 18.… more
- Amazon (Austin, TX)
- …our customers use for accelerated computing through Machine Learning acceleration and FPGA acceleration. If you are interested in "building a complete product" from ... May 2023 and December 2025 Programming experience in System Verilog or UVM Preferred Qualifications Master's or PhD in Electrical Engineering or Computer Engineering… more