• Senior Lead CPU RTL…

    Google (Austin, TX)
    …experience. + 10 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. + Experience ... with RTL language (eg SystemVerilog) and related design processes (eg,...benefits at Google (https://careers.google.com/benefits/) . + Participate in developing CPU subsystem. Develop CPU subsystem front-end designs,… more
    Google (05/19/25)
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