• ASIC Design Verification

    Cisco (Maynard, MA)
    ASIC Design Verification II (Co-Op)... ASIC Design Verification II (Co-Op) United States Apply ... a company culture that empowers an inclusive future for all. **Your Impact** The ASIC Design Verification Co-Op Engineer will be a member of a team working… more
    Cisco (09/12/25)
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  • FPGA/ ASIC Design Engineer (Silicon…

    SpaceX (Redmond, WA)
    ASIC and/or FPGA + Participate in all phases of ASIC and/or FPGA design flow (eg synthesis, timing closure, verification ) + Work with ASIC ... ASIC /FPGA Design Engineer/Level I: $122,500.00 - $145,000.00/per year ASIC /FPGA Design Engineer/Level II : $140,000.00 - $170,000.00/per year Your… more
    SpaceX (09/11/25)
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  • ASIC /FPGA Project Engineer II

    Lockheed Martin (Denver, CO)
    …* 2\+ years of professional engineering experience * 1\+ year of experience in design , debug and/or verification of ASICs or FPGAs * Demonstrated self\-starter ... **Description:** Join Our Team as an ** ASIC & FPGA Project Engineer** where you will...this role look like?** We are building the best ASIC /FPGA team in the world at Lockheed Martin Space's… more
    Lockheed Martin (08/01/25)
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  • Sr. ASIC /SOC Verification Engineer…

    SpaceX (Sunnyvale, CA)
    …performance and capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC verification at block and system level + Write and review ... Sr. ASIC /SOC Verification Engineer (Silicon Engineering) Sunnyvale,...or computer engineering + 5+ years of experience with design verification and test bench development PREFERRED… more
    SpaceX (08/30/25)
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  • Sr. SOC/ ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    …automation scripts for various implementation steps + Closely collaborate with the ASIC design team to drive architectural feasibility studies, develop timing, ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...power/ground grid generation, place and route, timing, noise, physical verification , electromigration, voltage drop, logic equivalency and other signoff… more
    SpaceX (09/11/25)
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  • Sr. SOC/ ASIC Physical Design

    SpaceX (Bastrop, TX)
    …automation scripts for various implementation steps + Closely collaborate with the ASIC design team to drive architectural feasibility studies, develop timing, ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...power/ground grid generation, place and route, timing, noise, physical verification , electromigration, voltage drop, logic equivalency and other signoff… more
    SpaceX (09/11/25)
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  • Sr. ASIC Design Engineer (Silicon…

    SpaceX (Irvine, CA)
    Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...top level and deliver the fully verified, synthesis/timing clean design + Work closely with verification team… more
    SpaceX (08/22/25)
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  • Sr. SOC/ ASIC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering and ASIC implementation). In ... SR. SOC/ ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply...logic BIST, leveraging Siemens Tessent tools + Integration and verification of Design for Test (DFT) IPs… more
    SpaceX (09/09/25)
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  • Sr. Design Verification Engineer…

    SpaceX (Bastrop, TX)
    Sr. Design Verification Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... ultimate goal of enabling human life on Mars. SR. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX...of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC verification at block and system level… more
    SpaceX (08/22/25)
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  • Semiconduct Engr II

    Honeywell (Plymouth, MN)
    …and attention to detail will ensure the successful development and optimization of ASIC design projects. You will report directly to our Sr. Engineering ... Designer of high-performance low-power memory chips, ASICs, FPGA + Design and implement ASIC design ...languages such as C, C+, TCL, or PERL for design and verification tasks **MINIMUM QUALIFICATIONS: **… more
    Honeywell (09/10/25)
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