• Principal/ Senior Principal Digital ASIC

    Northrop Grumman (Jessup, MD)
    …deliver remarkable new advantages to the warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom digital circuits. ... or VHDL RTL + Circuit synthesis, formal verification, and static timing using state-of-the-art digital ASIC design...both are listed below:** **Basic Qualifications for Principal Digital ASIC Circuit Design Engineer Level:** + Bachelor's… more
    Northrop Grumman (12/05/25)
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  • Senior ASIC Engineer - SDC

    Cisco (San Jose, CA)
    **Sr. ASIC Engineer ** The application window is expected to close on 1/26/2026. The job posting may be removed earlier if the position is filled or if a ... year of ASIC experience. + Experience with microarchitecture and RTL implementation . + Experience with block/full chip SDC development in functional and test… more
    Cisco (12/03/25)
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  • ASIC Design Automation Engineer

    Broadcom (Fort Collins, CO)
    …have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** ASIC Design Automation Engineer ** Broadcom's ASIC Products Division ... is seeking a Design Automation Software Development Engineer . They will define, develop, deploy and support the...products and usage methodology to a world-wide, cutting edge, ASIC Design technology development and implementation team.… more
    Broadcom (11/12/25)
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  • Senior FPGA/ ASIC Engineer (Onsite)

    RTX Corporation (Cedar Rapids, IA)
    …or Computer Engineer that will be involved in the design, implementation , verification and integration of a wide variety of high-performance ASICs, FPGAs, and ... you interested in becoming part of a growing Avionics FPGA/ ASIC team? This position is for a highly experienced,...SoPCs for Collins Avionics solutions. As an engineer in this organization, you will be employing best… more
    RTX Corporation (01/01/26)
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  • SOC/ ASIC Physical Design Engineer

    SpaceX (Irvine, CA)
    …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... SOC/ ASIC Physical Design Engineer II (Silicon...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC more
    SpaceX (01/01/26)
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  • Senior ASIC Physical Design Engineer

    Cisco (Maynard, MA)
    …or Electrical Engineering and 4+ years of related experience * Hands-on experience in ASIC physical design and implementation * Experience with place & route ... networks. Acacia's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a...team can provide. Your Impact As a Physical Design Engineer , you will play a key role in the… more
    Cisco (12/21/25)
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  • ASIC Engineer , Physical Design

    Meta (Sunnyvale, CA)
    …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
    Meta (12/20/25)
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  • ASIC Engineer Physical Design

    Meta (Austin, TX)
    …the efficiency and innovation of our data center applications. **Required Skills:** ASIC Engineer Physical Design Responsibilities: 1. Develop and own physical ... Join Meta's Infrastructure organization to leverage your expertise in ASIC Physical Design, driving high-performance, AI/ML SoC and IP...design implementation of multi-hierarchy low-power and high-performance designs, including physical-aware… more
    Meta (12/20/25)
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  • ASIC /FPGA Design Engineer (Compute…

    Teradyne (North Reading, MA)
    …better business results. Opportunity Overview Our Hardware Engineering team is seeking an FPGA/ ASIC Design Engineer to work with a multi-disciplined team to ... design constraints for placement, timing closure and CDC + Implementation of designs into target technologies using synthesis and...place and route tools + Perform timing analysis using static timing analysis tools. + Perform lab debug of… more
    Teradyne (11/25/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Westford, MA)
    …human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering ... area targets. + Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking,...path planning and crafting needed. + Power user of Static Timing tools like Synopsys PrimeTime or Cadence Tempus.… more
    NVIDIA (11/12/25)
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