- Qualcomm (San Diego, CA)
- …is part of the Global SOC organization and is responsible for STA methodology and signoff, foundry technology enablement and analysis, design automation and internal ... EDA tools, design analysis and optimization tools and platforms, low power architecture, methodology , and IP, and foundation IP development. About the Role As a… more
- Qualcomm (San Diego, CA)
- …Engineering Group, Engineering Group > ASICS Engineering General Summary: As a Timing Engineer , you will play a vital role in Timing analysis targeting the Mobile, ... PT/PT-SI and Tempus. You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in...on contribution for STA timing sign off. A timing Engineer should be able to understand all kind of… more
- Lockheed Martin (Sunnyvale, CA)
- Description Join Our Team as a ASIC /FPGA Verification Engineer where you will work on the development of a sophisticated state‑of‑the‑art avionics product in a ... world, and are seeking a highly talented and motivated ASIC & FPGA Verification Engineer who has...for a given design. Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux‑based… more
- Meta (Austin, TX)
- …teams towards creating a first-pass silicon success. Required Skills: ASIC Engineer , Formal Verification Responsibilities: Provide technical leadership ... Summary: Meta is hiring ASIC Formal Verification Engineer within the...Formal Verification Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at… more
- Meta (Sunnyvale, CA)
- Summary Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... (SoC) for data center applications. As a Design Verification Engineer , you will be part of an agile team...the best in the industry, focused on developing innovative ASIC solutions for Facebook's data center applications. You will… more
- Theconstructsim (Milpitas, CA)
- …insurance Paid time off Relocation bonus Vision insurance Job Title: Front-End ASIC Design Engineer - Milpitas, CA Responsibilities Support customer's design ... through all phases of ASIC execution at Socionext. Ensure designs meet product Performance‑Power‑Area‑Schedule...Model Headquartered in New Jersey US Based Engineers Only Methodology and Process Driven Top performing engineers are the… more
- Hewlett Packard Enterprise Development LP (San Jose, CA)
- ASIC Engineer Sr StaffThis role has been designed as 'Hybrid' with an expectation that you will work on average 2 days per week from an HPE office.**Who We ... for next-generation networking platforms. We are looking for a seasoned**Design-for-Test (DFT) Engineer ** to join our team and contribute to the development of… more
- SQL Pager LLC (San Jose, CA)
- …environments including testbenches, scoreboards, regressions, tools, infrastructure and methodology Produce functional / code coverage metrics Run regression ... or MSEE with 1+ years experience Advanced knowledge of standard ASIC /FPGA verification flows including simulation, testbench development, and post silicon bring-up… more
- Advanced Micro Devices (Santa Clara, CA)
- …used in large‑scale AI and machine learning applications. Driving power methodology for AI‑specific hardware components (like tensor cores and matrix multiplication ... modeling: Creating power models and scripts for performance/power trade‑offs. Methodology Development: Researching, developing, and deploying methodologies and automated… more
- Qualcomm (Santa Clara, CA)
- …circuit design for wireless products (eg, LNAs, PLLs) and 4+ years in ASIC design, verification, or related work. OR Master's degree in Electrical Engineering or ... related field with 4+ years of ASIC design/verification experience. OR PhD in Electrical Engineering or related field with 2+ years of ASIC design/verification… more
