- Micron Technology, Inc. (Minneapolis, MN)
- …world to learn, communicate and advance faster than ever. Responsible for functional verification of next generation ASIC controller to test LPDDR6. Write ... degree in Computer Science, Electrical Engineering or related field. Position requires: 1. ASIC design or verification ; 2. EDA tools, ASIC simulations,… more
- US Tech Solutions (Goleta, CA)
- …independently and take ownership of verification deliverables within a UVM/ SystemVerilog environment. + The engineer will collaborate with design, ... **Job Description:** + The Verification Engineer will contribute to the...experience in Pre-Silicon Design Verification (FPGA or ASIC ). + Strong proficiency in SystemVerilog and… more
- The Boeing Company (El Segundo, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Verification Engineer on the Boeing Electronic Products team ... verification processes + Familiarity with defining the architectural framework for ASIC /FPGA verification using SystemVerilog /UVM, including the delivery… more
- Lockheed Martin (Denver, CO)
- **Description:** Join Our Team as a ** ASIC /FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art ... world, and are seeking a highly talented and motivated ** ASIC & FPGA Verification Engineer **...verification plan for a given design\. * Use SystemVerilog and Universal Verification Methodology \(UVM\) to… more
- Lockheed Martin (Highlands Ranch, CO)
- **Description:** Join Our Team as a ** ASIC /FPGA Verification Engineer ** where you will work on the development of a sophisticated state\-of\-the\-art ... Space's Silicon Solutions team and seeking a future\-looking Principal Verification Engineer who is able to case...in this role, you will need:** * Experience in verification of FPGA and ASIC devices *… more
- Northrop Grumman (Linthicum Heights, MD)
- …in HDL (VHDL/Verilog) and HVL ( SystemVerilog ) + Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology (UVM) + Experience with ... for both are listed below:** **Basic Qualifications Principal Digital Verification Engineer :** + Bachelor's degree in a...HVL ( SystemVerilog ) + Experience with FPGA or ASIC + Knowledge of Universal Verification Methodology… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , SoC Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Performance & Package Verification Responsibilities:… more
