- NVIDIA (Hillsboro, OR)
- We are now looking for a CPU Design Methodology Engineer ! The complexity of chip development has greatly increased over the years. We are now packing ... The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... emphasis on PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes + Develop flows for advanced place and… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... emphasis on PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes + Develop flows for advanced place and… more
- Amazon (Sunnyvale, CA)
- …blocking issues. Key job responsibilities Design Verification of Subsystems such as CPU , NPU, and SOC. Drive Verification Methodology using System Verilog / ... generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate...role, you will be responsible for defining the verification methodology and implementing the corresponding test plan for sub-systems… more
- Capgemini (Seattle, WA)
- **Job Description:** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal candidate ... 10 years of hands-on experience with SystemVerilog and UVM methodology . + Proficiency in one or more of the...**Organization:** _ERD PPL US_ **Title:** _Lead E/E & Semiconductor Engineer - SOC Design Verification Engineer_ **Location:**… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications. As a Design Verification Engineer , you will be part...cycles 9. 8+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 10. 8+ years experience… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a agile team working with… more
- Meta (Austin, TX)
- …from transistors, through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement ... verification 2. Develop functional tests based on verification test plan 3. Drive Design Verification to closure based on defined verification metrics on test plan,… more
- Microsoft Corporation (Mountain View, CA)
- …Python OR equivalent experience. - 10+ years of relevant experience. - Expertise in CPU /SoC design principles. - For Front-End Handoff CAD Roles: - In-depth ... curious engineers to join our Central Front-End Tools, Flows and Methodology (TFM) group. This team drives state-of-the-art converged solutions, automation, and… more
- BrainChip, Inc. (Laguna Hills, CA)
- BrainChip is seeking a Senior Digital Design Engineer to join a team working on cutting-edge and novel AI hardware. The primary job function is to work with team ... part of our Hardware Development group. The Sr. Digital Design Engineer needs to be able to...Collaborate with other team members to define a verification methodology and a test plan Write clear documentation of… more