- Qualcomm (San Diego, CA)
- …drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL ... design team to develop timing constraints, drive...with STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple… more
- Qualcomm (San Diego, CA)
- …teams (RTL, Physical Design , Circuits, CAD) to address critical physical design challenges in CPU implementations. + Develop innovative techniques ... Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU ...PPA Pathfinding Engineer, you will work with Architecture, RTL, Physical Design , Circuits, CAD and Post-Silicon teams… more
- Qualcomm (Austin, TX)
- …to create designs that push the envelope on performance, energy efficiency and scalability. As CPU Physical Design CAD engineer, you will build and support ... and resolve project-specific issues + Work closely with worldwide CPU physical design teams, and...nodes (5nm or lower) + Solid understanding of digital design , timing analysis and physical … more
- NVIDIA (Hillsboro, OR)
- …meet performance, timing and power targets. + Deliver a synthesis/ timing clean design while working with the physical design team ensuring a routable ... We are looking for a Senior CPU Design Engineer! NVIDIA is seeking...fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks.… more
- Qualcomm (San Diego, CA)
- … operations for all Qualcomm Business Units. Minimum Skill/Experience: + 2-10 yrs experience in Physical Design and timing signoff for high speed cores. + ... Engineer, you will lead innovative Central Processing Unit ( CPU ) design efforts that have a critical...Should have good exposure to high frequency design convergence for physical design … more
- Qualcomm (Austin, TX)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer, you will work with ... + Experience with Synthesis, place and route and signoff timing /power analysis. + Knowledge of high performance and low... design , Circuits, CAD) to solve key physical design problems in CPU … more
- Qualcomm (Santa Clara, CA)
- …Work with multi-functional engineering team to implement and validate physical design on the aspects of timing , area, reliability, testability and power. ... Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** We are hiring a talented...simulators and waveform debugging tools. * Knowledge of logic design principles along with timing and power… more
- Qualcomm (Santa Clara, CA)
- …synthesis, place & route and tape out flows. Roles and Responsibilities + Perform CPU physical design tasks, including floorplanning, Bump/RDL planning, IP ... and physical design teams to design , floorplan and integrate the CPU designs...+ Proficiency in synthesis, place and route, and signoff timing /power analysis. + Expertise in block-level implementation as well… more
- Qualcomm (Austin, TX)
- …Work with multi-functional engineering team to implement and validate physical design on the aspects of timing , area, reliability, testability and po ... targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you...+ RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing… more
- NVIDIA (Santa Clara, CA)
- …need to see: + BS or MS (or equivalent experience) + 6+ years of CPU design implementation experience + Deep understanding of logic optimization techniques and ... expertise to improve PPA (power, performance and area) on CPU designs by collaborating with logic designers, physical...from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical … more
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