• CPU Physical Design

    Qualcomm (Folsom, CA)
    …drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer, you will work with microarchitecture and RTL ... design team to develop timing constraints, drive...with STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple… more
    Qualcomm (03/04/25)
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  • CPU Physical Design Engineer

    Qualcomm (San Diego, CA)
    …and implement multi-core CPU operations for all Qualcomm Business Units. As a CPU Physical Design Engineer, you will work with microarchitecture and RTL ... power implementation methods + Knowledge of CPU microarchitecture, logic design and circuits ** Physical Requirements** + Frequently transports between… more
    Qualcomm (04/01/25)
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  • CPU Physical Design

    Qualcomm (San Diego, CA)
    …teams (RTL, Physical Design , Circuits, CAD) to address critical physical design challenges in CPU implementations. + Develop innovative techniques ... Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU ...PPA Pathfinding Engineer, you will work with Architecture, RTL, Physical Design , Circuits, CAD and Post-Silicon teams… more
    Qualcomm (04/03/25)
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  • Sr. Staff CPU Physical Design

    Qualcomm (Santa Clara, CA)
    …to create designs that push the envelope on performance, energy efficiency and scalability. As CPU Physical Design CAD engineer, you will build and support ... and resolve project-specific issues + Work closely with worldwide CPU physical design teams, and...nodes (5nm or lower) + Solid understanding of digital design , timing analysis and physical more
    Qualcomm (03/06/25)
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  • Senior CPU Design Engineer

    NVIDIA (Hillsboro, OR)
    …meet performance, timing and power targets. + Deliver a synthesis/ timing clean design while working with the physical design team ensuring a routable ... We are looking for a Senior CPU Design Engineer! NVIDIA is seeking...fellow design engineers, architects, verification engineers, and physical design engineers to accomplish your tasks.… more
    NVIDIA (03/27/25)
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  • CPU SRAM Design Engineer

    Qualcomm (Austin, TX)
    …with CAD team to ensure proper and efficient model generation + Interacting with Physical Design team resolve memory PPA challenges + Depending on skill set, ... to build products to change the world. As a CPU SRAM Design Engineer, you will ...designs + Experience with all memory analysis steps including design entry, functional verification, layout guidance, simulation, timing more
    Qualcomm (03/04/25)
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  • Principal CPU Systems Debug…

    Qualcomm (Santa Clara, CA)
    …Work with multi-functional engineering team to implement and validate physical design on the aspects of timing , area, reliability, testability and power. ... Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** We are hiring a talented...simulators and waveform debugging tools. * Knowledge of logic design principles along with timing and power… more
    Qualcomm (04/20/25)
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  • CPU Micro-architect/RTL Designer (Multiple…

    Qualcomm (Santa Clara, CA)
    …Work with multi-functional engineering team to implement and validate physical design on the aspects of timing , area, reliability, testability and po ... targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer, you...+ RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing more
    Qualcomm (04/04/25)
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  • Senior CPU Implementation Methodology…

    NVIDIA (Santa Clara, CA)
    …need to see: + BS or MS (or equivalent experience) + 6+ years of CPU design implementation experience + Deep understanding of logic optimization techniques and ... expertise to improve PPA (power, performance and area) on CPU designs by collaborating with logic designers, physical...from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical more
    NVIDIA (03/21/25)
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  • Senior High-Performance ASIC Timing

    NVIDIA (Santa Clara, CA)
    …skills and ability to collaborate with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out ... CPU , GPU and SOC designs. + Owning static timing analysis and convergence of high-performance designs. + You...(or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in… more
    NVIDIA (03/25/25)
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