• Qualcomm (San Diego, CA)
    …to help create a smarter, connected future for all. We are hiring talented engineers for CPU Power Modeling for high performance, low power designs. In ... this role, you will be responsible for all key aspects of CPU power modeling , analysis and optimization of state-of-the-art CPUs that push the envelope on… more
    job goal (01/12/26)
    - Related Jobs
  • Qualcomm (San Diego, CA)
    A leading technology innovator is hiring a CPU Power Modeling Engineer in San Diego, California. This role involves modeling , analyzing, and optimizing ... or related fields, with at least 2 years of relevant experience in CPU power modeling . Competitive compensation ranges from $122,500 to $183,700, alongside a… more
    job goal (01/13/26)
    - Related Jobs
  • Qualcomm (Santa Clara, CA)
    …and power optimization opportunities in collaboration with the CPU modeling team Develop high‑level architecture and microarchitecture specifications ... CPU Engineering General Summary: We are hiring talented engineers for RISCV CPU RTL development targeting high‑performance, low‑ power devices. In this role,… more
    job goal (01/12/26)
    - Related Jobs
  • Lattice Semiconductor (San Jose, CA)
    …with power measurements, and power modeling and analysis of power /performance across various hardware IPs (eg CPU , GPU, DSP, TPU) Knowledge of RTL ... and debug Develop FPGA-focused power and performance benchmarks Develop power models and modeling methodologies, and implement in software Establish… more
    job goal (01/13/26)
    - Related Jobs
  • NVIDIA Corporation (Santa Clara, CA)
    Senior SoC Power Architect page is...depth.**Ways to stand out from the crowd: Experience with modeling and optimization of power and/or performance.* ... loaded## Senior SoC Power Architectlocations: US, CA, Santa Clara: US, OR, Hillsborotime...SoC units to evaluate architectural tradeoffs in DL/ML (training/inference), CPU , GPU, and multimedia workloads.**What we need to see:… more
    job goal (01/12/26)
    - Related Jobs
  • NVIDIA Corporation (Santa Clara, CA)
    Senior GPU Memory Architect page is loaded## Senior GPU Memory Architectlocations: US, CA, Santa Claratime type: Full timeposted on: Posted 2 Days Agojob ... understanding and analyzing memory systems architecture to improve performance, power , and area (PPA). A broad perspective across the...area (PPA). A broad perspective across the field of CPU /GPU architecture and depth in the area of PPA… more
    job goal (01/13/26)
    - Related Jobs
  • Qualcomm (San Diego, CA)
    …General Summary: Join Qualcomm's rapidly expanding Data Center Business Unit as the Senior Director of Product Management, where you will shape the future of ... center platforms and rack-level systems, including compute nodes, interconnect fabrics, power delivery, and cooling subsystems. Lead market analysis to identify AI… more
    job goal (01/13/26)
    - Related Jobs
  • Nutanix (San Diego, CA)
    …General Summary: Join Qualcomm's rapidly expanding Data Center Business Unit as the Senior Director of Product Management, where you will shape the future of ... center platforms and rack-level systems, including compute nodes, interconnect fabrics, power delivery, and cooling subsystems. Lead market analysis to identify AI… more
    job goal (01/12/26)
    - Related Jobs
  • Arm Limited (Austin, TX)
    …management Knowledge of memory and IO systems, and systems-level performance modeling and analysis. Understanding of general-purpose CPU microarchitecture, ... Job Overview: We are seeking a versatile Senior Principal SoC Architect to join our System...Work with hardware and software engineering teams to refine power expectations under various workloads Required Skills and Experience… more
    job goal (01/13/26)
    - Related Jobs
  • quadric.io, Inc (Burlingame, CA)
    …to get in on the ground floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will contribute to all stages of the ... & RTL implementation of the processor in SystemC or SystemVerilog Own Power , Performance & Area (PPA) optimization Contribute to timing closure through full… more
    job goal (01/13/26)
    - Related Jobs