- NVIDIA (Santa Clara, CA)
- …5nm/3nm/2nm and beyond. + Good understanding of circuit design styles in CMOS: domino circuits , high speed clocking, clock muxing circuits etc and how to ... inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's leading GPUs and… more
- Micron Technology, Inc. (San Jose, CA)
- …key IO design building blocks (eg input receiver, equalizer, SerDes, Clock distribution circuits ) to meet specifications and validate functionality and ... products. **Position Overview** The Senior Member of Technical Staff Design Engineer in Micron's NVEG organization contributes...of new memory products by assisting with the overall design , layout, and optimization of datapath circuits … more
- Google (Sunnyvale, CA)
- Physical Design Engineer , 3D Technology, PhD, University Graduate _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving ... on TPU architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer in 3D Technology, you will collaborate with technology,… more
- Teledyne (Goleta, CA)
- …being on a team that wins. **Job Description** **Job Summary:** ASIC Digital Design Engineer : Oversees definition, design , verification, and documentation ... of multidimensional designs involving the layout of complex integrated circuits . Evaluates all aspects of the process flow from...readout sequencing, windowing). + Finite State Machine and datapath design for ASIC modes. + Clock domain… more
- RTX Corporation (El Segundo, CA)
- …Mission Hardware team is seeking a determined and passionate **Senior Electrical Design Engineer ** specializing in digital and high-speed processing designs that ... team with our engineers to generate and utilize today's cutting-edge technology to design digital electronics circuits that implement video and digital signal… more
- Teledyne (Chestnut Ridge, NY)
- …excitement of being on a team that wins. **Job Description** Summary: The Senior IC Design Engineer will collaborate closely with other members of the IC ... test and measurement products we develop, the Senior IC Design Engineer will also collaborate with the...mux, driver, receiver) . Clocking (frequency multipliers, phase shifters, clock distribution, re-timers) . High speed sampling (track and… more
- Google (Sunnyvale, CA)
- Physical Design Engineer , University Graduate, PhD _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... on TPU architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will collaborate with Register-Transfer Level (RTL), … more
- Emerson (Austin, TX)
- …known as NI) Product R&D has an immediate opening for a Principal Digital Hardware Engineer within our talented hardware design team in Austin, TX. In this role, ... control, EMI, and PCB stack-up. + Experience with clocking architectures, including clock tree design , PLL configuration, and jitter analysis and mitigation… more
- Northrop Grumman (Jessup, MD)
- …warfighter. We are seeking a front-end ASIC design engineer for design and verification of full-custom digital circuits . Must be proficient in Verilog, ... with place and route engineers for floor planning and clock tree constraints and timing closure. Automated place and...listed below:** **Basic Qualifications for Principal Digital ASIC Circuit Design Engineer Level:** + Bachelor's degree in… more
- Google (Sunnyvale, CA)
- Physical Design Engineer , Google Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Early** Experience completing work as directed, and collaborating ... focus on TPU architecture and its integration within AI/ML-driven systems. As a Physical Design Engineer , you will collaborate with RTL, design for testing… more