- Cadence Design Systems, Inc. (San Jose, CA)
- …innovators who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe ... Engineer , you will support the technical presales of DDR IP by generating collateral through simulations, synthesis and...and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA design… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Join the High-Performance Culture at Cadence. As a Lead Technical Presales Engineer , you will use your knowledge of different memory interface standards to ... architect memory solutions for customers using Cadence DDR IP . This role offers the benefit of...and designers . Write application notes, user guides, articles, design ideas, new product proposals, and evaluation kit manuscripts… more
- Broadcom (San Jose, CA)
- …apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for HBM/ DDR /SERDES Verification Lead Engineer position at our San Jose, ... seeking a highly skilled HBM and SerDes DFT Verification Engineer to join our dynamic team. In this role,...in ensuring the robustness and reliability of our HBM, DDR and SerDes designs through comprehensive Design … more
- Micron Technology, Inc. (Richardson, TX)
- …learn, communicate and advance faster than ever. Micron Technology is seeking a **Senior Design Engineer ** to join its High Bandwidth Memory (HBM) team in ... to next-generation memory solutions for AI and ML applications. The engineer will collaborate across global teams to ensure high-performance, cost-effective, and… more
- Northrop Grumman (Beavercreek, OH)
- …microelectronics design and fabrication. MDA is seeking an **Associate Electronics Hardware Design Engineer / Electronic Hardware Design Engineer .** ... can be filled as an Associate Advanced Electronic Hardware Design Engineer or an Electronic Hardware ...design cycle (concept through production) experience involving FPGAs, DDR memory, high speed serdes, and microprocessors + Experience… more
- Broadcom (San Jose, CA)
- …and production boards using cutting-edge Broadcom SOCs. We are seeking a highly motivated Hardware Design Engineer with a strong focus on system design to ... and implementation of high-power, low-noise analog power systems, DDR interfaces, and other critical components. + Collaborate closely...8+ years of proven experience as a Hardware Systems Design Engineer , with a focus on system… more
- Applied Materials (Santa Clara, CA)
- …(https://hrportal.ehr.com/applied/) . **Position Overview** We are seeking an experienced FPGA Design Engineer with strong expertise in Xilinx Zynq SoC/MPSoC ... new chip and advanced display in the world. We design , build and service cutting-edge equipment that helps our...multimeters, oscilloscopes, chipscope. * Validate board-level interfaces such as DDR , high-speed IOs, I2C, UART, SPI. * Work closely… more
- Micron Technology, Inc. (Richardson, TX)
- …advance faster than ever. Micron is seeking a highly motivated and experienced ASIC Design Engineer to define and drive the architecture of next-generation ASICs ... + Architect and model data path, control path, cache design , and IO interface logic for high-speed memory access...such as ECC engines, DMA controllers, memory interfaces (eg, DDR , LPDDR, ONFI, UCIe, PCIe, NVMe), and die-to-die communications… more
- Northrop Grumman (Beavercreek, OH)
- …is seeking a **Principal/Sr Principal Printed Circuit Board (PCB) Layout Designer Engineer ** in Beavercreek, OH (Dayton, OH) to support architecture definition and ... product design . We are seeking engineers with the desire to...structures + Perform complex circuit card layout tasks including DDR memory interfaces, high speed SERDES links, high density… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Job Description: + Lead cutting-edge electrical and functional validation for next-generation DDR interfaces such as DDR5, LPDDR5, LPDDR6, HBM and GDDR7. + ... Design and execute innovative testing strategies to accelerate post-silicon...and reporting. + Be the go-to expert for customer DDR IP challenges, ensuring rapid debug and world-class technical… more