- Microsoft Corporation (Raleigh, NC)
- …a trusted experience to customers and partners worldwide and we are looking for a ** DDR IP Verification Engineer ** to help achieve that mission. ... to Microsoft cloud hardware. We are looking for a ** DDR IP Verification Engineer...a memory controller Intellectual Property ( IP ) and/or Double Data Rate ( DDR ) subsystem… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …a Technical Presales Engineer , you will support the technical presales of DDR IP by generating collateral through simulations, synthesis and publications. As ... of different memory interface standards to architect memory solutions for customers using Cadence DDR IP . This role offers the benefit of both technical growth… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …of different memory interface standards to architect memory solutions for customers using Cadence DDR IP . This role offers the benefit of both technical growth ... of the Technical Field Organization helping educate customers and providing solutions using our DDR IP portfolio. Our memory PHY and controller IPs are used in… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our ... team focused on the development and support of high-performance IP related to memory protocols such as DDR...world. We are seeking a Post Silicon Memory Product Engineer to support silicon bring-up, debug, and production ramp… more
- Meta (Menlo Park, CA)
- …a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....We are looking for individuals with experience in Design Verification to build IP and System On… more
- Meta (Sunnyvale, CA)
- …a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/ IP /System on Chip (SoC) ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....We are looking for individuals with experience in Design Verification to build IP and System On… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and hardware/software co- verification Nice to Have + Experience building Acceleratable Verification IP (AVIP) + Familiarity with end-to-end verification ... are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our… more
- Cisco (Milpitas, CA)
- …requirements. + IP Integration: Integrate and verify internal and third-party Intellectual Property ( IP ) cores, such as high-speed memory controllers ... We are seeking a highly experienced and accomplished FPGA Senior Design Engineer to provide technical leadership and deep expertise in the architecture, design,… more
- Broadcom (San Jose, CA)
- …+ Familiarity with overall chip design methodologies and tools + Knowledge of CPU, DDR , Bus Protocol , Network Protocol or DSP design preferred **Additional ... The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP , is looking for qualified individuals to work in SoC and IP … more
- Applied Materials (Santa Clara, CA)
- …more about our benefits (https://hrportal.ehr.com/applied/) . As an Electrical Engineer , you are responsible for designing, modifying, and troubleshooting electrical ... **Position Overview** We are seeking an experienced FPGA Design Engineer with strong expertise in Xilinx Zynq SoC/MPSoC platforms...Development** * Design and implement FPGA logic using Vivado, IP Integrator, and Vitis. * Develop RTL modules in… more