• CAD - DV Emulation Engineer

    Qualcomm (Santa Clara, CA)
    …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the DV & Emulation methodology and support, you ... will work with RTL, architecture, design, DV , software and silicon verification users. Interfaces with various cross functional teams and external vendors to define,… more
    Qualcomm (05/25/24)
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  • Camera DV Engineer

    Qualcomm (Santa Clara, CA)
    …in as a Multimedia Design Verification in Camera/Imaging team. A successful DV candidate will work on developing verification infrastructure for Camera IP delivered ... SystemC. **Preferred Qualifications** + 5+ years of experience with - A successful DV candidate will be detail oriented with solid analytic and debugging skills,… more
    Qualcomm (06/01/24)
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  • System DV Engineer

    Micron Technology, Inc. (San Jose, CA)
    …of building test plans and coverage closure + Clear mindset on how to achieve DV quality signoff + Good communication skills to work in a cross-functional team in ... cross-geographical locations + BS or above in Electrical Engineering or Computer Science related majors The US base salary range that Micron Technology estimates it could pay for this full-time position is: $154,000.00 - $326,000.00 Our salary ranges are… more
    Micron Technology, Inc. (04/26/24)
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  • CAD - DV Design Engineer

    Qualcomm (Santa Clara, CA)
    …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CAD Engineer focusing on the methodology and support of RTL design verification, you ... will work with architecture, design, software and verification leads to develop technology critical to the development of our products. You will be involved from conception to final creation and every step along the way. Roles and Responsibilities + Work with… more
    Qualcomm (05/25/24)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (Santa Clara, CA)
    **Job Title: DV Engineer ** **Job Location: Santa Clara CA** **Job description:** We are seeking a Design Verification Engineer for our full-time role with ... Capgemini Engineering. **Key responsibilities:** . General DV skills, someone who can understand the specs, work...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
    Capgemini (05/14/24)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (Santa Clara, CA)
    **Job Title: Senior DV Engineer ** **Job Location: Santa Clara CA** **Job description:** We are looking for Senior Design Verification Engineer **Key ... their journey towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors… more
    Capgemini (06/01/24)
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  • IA Splunk Engineer , Senior - TS/SCI

    Jacobs (Warrenton, VA)
    **Your Impact:** \#lonewolf # dv Jacobs is looking for Senior Splunk Engineer to support its federal program in Warrenton, VA. Our mission is to operate and ... maintain the Distributed Continuity Integrated Network - Top Secret Enterprise Services (DCIN-TS ES). The DCIN-TS ES is a DoD provided, TS//SCI, integrated voice, video, and data, global communications network that facilitates collaboration among senior… more
    Jacobs (03/21/24)
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  • Design Verification Engineer

    Meta (Redmond, WA)
    …of our industry leading virtual and augmented reality systems.As a Design Verification Engineer (DVEs), you will be a key contributor in planning, reviewing and ... efforts at the IP and sub-system levels. You will collaborate in improving DV methodologies and establishing best practices. Your expertise is needed in all phases… more
    Meta (05/09/24)
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  • Staff Design Verification Engineer (Boston…

    Lightmatter (Boston, MA)
    Staff Design Verification Engineer Lightmatter is a photonic computer company redefining what computers and human beings are capable of by building engines that will ... efficient inference and training engines. As a Design Verification Engineer at Lightmatter, you will find yourself at the...coverage, and overseeing the final sign-off on Design Verification ( DV ). + Develop Real Number Models (RNM) for photonics… more
    Lightmatter (05/04/24)
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  • ASIC Verification Engineer

    Cisco (San Jose, CA)
    …in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification engineers, designers, ... ASIC bring up. What You'll Do * Maintaining existing DV environments and enhancing them * Construct testbench including...You Are * You are an ASIC Design Verification Engineer with 5+ years of related work experience with… more
    Cisco (04/21/24)
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