- Capgemini (San Francisco, CA)
- …_ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification ( DV ) Engineer_ **Location:** _CA-San Francisco_ **Requisition ID:** ... **Job description:** Analog/Mixed-Signal Design Verification **Key responsibilities:** + Extract...Develop timing model for the circuit working with layout engineer . + This role will provide the ability to… more
- Cisco (San Jose, CA)
- …and Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as ... ASIC in deployment-mode applications * You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of the… more
- Amazon (San Diego, CA)
- …technologies. In this role you will: . Implement a state of the art verification environment to facilitate testing of the RTL against reference Matlab/C models . ... be reused for the ASIC implementation . Run formal verification of complex blocks to ensure functional correctness ....blocks to ensure functional correctness . Work with the design and communication systems team and participate in system… more
- Micron Technology, Inc. (San Jose, CA)
- …models (LLMs) for the purpose of automated Silicon design and Design Verification ( DV ). The engineer is expected to build LLM based EDA workflows ... which assists the Design Engineers in building the next Micron product at...LLMs for the purpose of automated corner case uncovering, design optimization and spec-to- design translation. + Develop… more
- Qualcomm (Austin, TX)
- … DV Infrastructure Engineer focusing on the methodology and support of RTL design verification , you will work with design , verification , and CAD ... and external vendors. Collaborate with both CAD and front-end design teams in productizing solutions to enable faster and...and architect flow solutions tied to internal and vendor-based RTL/ Verification CAD tools. + Interact with DV … more
- Qualcomm (Santa Clara, CA)
- …**Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Design Verification Lead, you will lead a team of ASIC design ... a team defining the processes, methods and tools for design verification of large complex IP blocks...+ 8+ years or more of practical semiconductor ASIC DV experience including owning end-to-end verification of… more
- BAE Systems (Nashua, NH)
- …Other incentives may be available based on position level and/or job specifics. **FPGA Design Verification Engineer I** **111665BR** EEO Career Site Equal ... and advancing your career. BAE is looking for FPGA Design Verification Engineers who can contribute at...your leadership skills while leading small to medium sized DV teams + Create reusable Verification IP… more
- Capgemini (San Jose, CA)
- …_Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Mixed-Signal Design Verification Engineer_ **Location:** ... **Job Role: Senior** **Mixed Signal DV Engineer ** **Job Location: San Jose...This role will provide the ability to directly influence design related changes as required to meet functional specifications.… more
- BAE Systems (Manchester, NH)
- …Other incentives may be available based on position level and/or job specifics. ** Design Verification Engineer - FPGA - (Sign-on Bonus)** **110458BR** ... career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect,...your leadership skills while leading small to medium sized DV teams + Create reusable Verification IP… more
- Qualcomm (Santa Clara, CA)
- …with scripting tools and programming languages. * 2+ years of experience with design verification methods. Qualcomm is an equal opportunity employer. If you ... to verify WiFi Standards, creating test sequences, and validating design components + Own end-to-end DV tasks...Engineering, or related field and 2+ years of ASIC design , verification , validation, integration, or related work… more