• Design automation STA…

    Broadcom (Fort Collins, CO)
    …have a Candidate Account, please Sign-In before you apply.** **Job Description:** **IP STA Champion Description** **Main Goals** **1. Work with DA STA Team ... quality ETM or Liberty timing models that meets APD STA standards:** + **Correct timing modes that align with... background** + **Should be familiar with APD DI design flows** + **Bachelors and 12+ years of related… more
    Broadcom (10/04/25)
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  • STA /Emir IC Lead Solutions Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to ... and deliver on timing analysis, ECO flows, Extraction, Power, EMIR and/or physical design and ensure integrity of delivered solutions. Individual should be able to… more
    Cadence Design Systems, Inc. (09/24/25)
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  • STA Principal Application Engineer

    Cadence Design Systems, Inc. (Austin, TX)
    …the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to ... on SDC constraints, advanced OCV/SOCV concepts, derates, PBA timing, Distributed and Concurrent STA flows. . Work efficiently with R&D and customer to enable various… more
    Cadence Design Systems, Inc. (08/14/25)
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  • ASIC Automation and Integration…

    Broadcom (Irvine, CA)
    …strong team player. Candidates will primarily be responsible for working on automating design flows, supporting synthesis deliverables & STA . Apart from this, ... of devices. The candidate will work with our worldwide design and architecture teams to develop leading edge products....experience in flow development , synthesis constraints development / STA is a must, or MSEE and 10+ years… more
    Broadcom (10/02/25)
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  • Physical Design Engineer (Einfochips…

    Arrow Electronics (San Jose, CA)
    **Position:** Physical Design Engineer (Einfochips Inc) **Job Description:** **What candidate will Be Doing:** + Netlist to-GDSII implementation, including ... top-level floorplanning,, Design partitioning, Top level block to block/over the block...simulation, power mesh planning, and full signoff (DRC, LVS, STA , EMIR). + Own and drive PnR execution and… more
    Arrow Electronics (09/10/25)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's leading GPUs and ... and reliability through increasingly comprehensive modeling, informative analysis, and automation . This work will influence the entire next generation computing… more
    NVIDIA (07/19/25)
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  • Senior ASIC Physical Design and Timing…

    NVIDIA (Santa Clara, CA)
    …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... and Timing + Hands-on experience in full-chip/sub-chip Static Timing Analysis ( STA ), timing constraints generation and management, and timing convergence. +… more
    NVIDIA (08/23/25)
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  • Sr. SOC/ASIC Physical Design…

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...logic equivalency and other signoff checks) + Develop/improve physical design methodologies and automation scripts for various… more
    SpaceX (09/11/25)
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  • SoC Physical Design Engineer

    Meta (Austin, TX)
    …stack, from transistor, through architecture, to firmware, and algorithms.As an SoC Physical Design Engineer at Meta Reality Labs, you will perform physical ... area requirements needed for our wearable products. **Required Skills:** SoC Physical Design Engineer Responsibilities: 1. Physical design implementation… more
    Meta (10/05/25)
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  • Sr. SOC/ASIC Physical Design…

    SpaceX (Bastrop, TX)
    Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring ... of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...logic equivalency and other signoff checks) + Develop/improve physical design methodologies and automation scripts for various… more
    SpaceX (09/11/25)
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