- Qualcomm (San Diego, CA)
- …a background in 2.5D/3D on- chip integration, process technology, and design enablement . Responsibilities include: + Develop power grid structure for key IPs ... **General Summary:** Qualcomm has a position in San Diego, CA, focusing on on- chip power grid optimization for sub 2nm nodes. The role involves driving 3D system… more
- Micron Technology, Inc. (Folsom, CA)
- … power per bit solutions in the industry. We are hiring Foundry PDK Enablement Engineer ! You will be responsible for overseeing and driving the development, ... DRAM chips on a high-speed memory controller with an integrated logic chip in one package, significantly increasing memory density and bandwidth through… more
- Micron Technology, Inc. (Folsom, CA)
- …solutions in the industry. We are seeking a highly skilled and motivated **PDK Enablement Engineer ** to join our team!. The ideal candidate will be responsible ... on a high-speed memory controller with an integrated logic chip in one package, significantly increasing memory density and...+ 3+ years of experience in PDK development, design enablement , or related areas is a plus. + 3+… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking Senior Platform Solutions Engineer for system level bringup, debug and validation of GPU and SoC product platforms. The sophisticated nature of ... various chip features poses many exciting debugging situations. Someone with...qualification including feature checks, system stress at PVT conditions, enablement and debug of product platforms at module or… more
- The Boeing Company (Tukwila, WA)
- …for aerospace systems. SSED develops digital, analog, and RF Systems on Chip (SoCs) for radar, navigation, electronic warfare, communications, processing, and other ... is actively hiring an **Associate Analog Mixed Signal Integrated Circuit (IC) Design Engineer ,** who has expertise Analog Mixed Signal Design or has course work in… more
- The Boeing Company (Tukwila, WA)
- …for aerospace systems. SSED develops digital, analog, and RF Systems on Chip (SoCs) for radar, navigation, electronic warfare, communications, processing, and other ... projects. We are actively looking to fill a **Lead Analog Mixed Signal Design Engineer ** role in SSED. Ideal candidate would be one who has proven experience in… more
- Amazon (Seattle, WA)
- …the Trn1 and Inf1 servers that use them. This role is for a senior software engineer in the Machine Learning Applications (ML Apps) team for AWS Neuron. This role is ... responsible for development, enablement and performance tuning of a wide variety of...The ML Apps team works side by side with chip architects, compiler engineers and runtime engineers to create… more
- Amazon (Seattle, WA)
- …Machine Learning accelerators. This role is for a senior machine learning engineer in the Distribute Training team for AWS Neuron, responsible for development, ... enablement and performance tuning of a wide variety of...ML Distributed Training team works side by side with chip architects, compiler engineers and runtime engineers to create,… more
- Amazon (Seattle, WA)
- …the Trn1 and Inf1 servers that use them. This role is for a senior software engineer in the Machine Learning Applications (ML Apps) team for AWS Neuron. This role is ... responsible for development, enablement and performance tuning of a wide variety of...The ML Apps team works side by side with chip architects, compiler engineers and runtime engineers to create… more
- Amazon (Cupertino, CA)
- …the Trn1 and Inf1 servers that use them. This role is for a senior software engineer in the Machine Learning Applications (ML Apps) team for AWS Neuron. This role is ... responsible for development, enablement and performance tuning of a wide variety of...The ML Apps team works side by side with chip architects, compiler engineers and runtime engineers to create… more
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