- Apple Inc. (Cupertino, CA)
- A leading technology company in Cupertino seeks a DFT Design Verification Engineer to help design and manufacture next-generation processors. The role ... a Bachelor's Degree and familiarity with large processors and verification methodologies. Competitive compensation and comprehensive benefits are offered.… more
- Mythic, Inc. (Palo Alto, CA)
- …(Karnataka, India). About This Role We are seeking a Director / Principal Engineer of Digital Design Verification to provide technical and strategic leadership ... accelerators); Memory subsystems; Power management, boot, security, clocking, reset, and DFT features. Define and enforce UVM-based verification methodologies.… more
- NVIDIA Corporation (Santa Clara, CA)
- Senior ASIC Verification Engineer page is loaded## Senior...and reset logic to various units in SOC and GPU ASIC. The complexity of the clocks and resets ... Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design...doing: Own validation of Clocking structures in Tegra and GPU products from start to finish, including test plan… more
- NVIDIA Corporation (Santa Clara, CA)
- We are now looking for a DFT Methodology Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post‑silicon validation on some of the… more
- NVIDIA Corporation (Santa Clara, CA)
- …other team members, we deliver clock RTL information to GPU , CPU and SOC verification team, timing and DFT teams.* Get involved in end-to-end cycle of ASIC ... reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC...law.The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible… more
- Advanced Micro Devices (Santa Clara, CA)
- …SystemVerilog Deep knowledge of front-end tools experience with synthesis, static timing, DFT Exposure to physical design and verification methods Experience ... with IP and SOC Architecture team, RTL design team, verification team, and physical design team to drive the...and non-coherent) Experience with modern heterogenous systems including CPU, GPU , and AI accelerators. Experience with SOC and IP… more
- Cerebras (Sunnyvale, CA)
- …PD team members for design closure to meet PPA goals. Work closely with Design verification and DFT teams for achieving the best functional and test coverage. ... solution in the world, over 10 times faster than GPU -based hyperscale cloud inference services. About The Role As...services. About The Role As a lead front-end design engineer , you will be a key part of the… more
- Theconstructsim (Milpitas, CA)
- Front-End ASIC Design Engineer - Semiconductor Industry 401(k) 401(k) matching Relocation bonus Job Title: Front-End ASIC Design Engineer Job Description ... Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/ DFT checks; Synthesis & supporting timing-closure; Contribute to and support… more
- Qualcomm (San Diego, CA)
- …positions in our SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and cores using state-of-the-art tools ... deliveries of complex, high-speed, low power designs such as GPU , Camera and other MM, DDR, Modem, Audio ....this role involves good understanding of functional and test ( DFT ) mode constraints for place and route, floorplanning, power… more
- Eridu Corporation (San Francisco, CA)
- …industry-first innovations across semiconductors, software, and systems to unlock greater GPU utilization, reduce capital and power costs, and maximize data center ... contact lens). Position Overview We are seeking an RTL Engineer to help define and implement our industry-leading Networking...Ethernet block with MAC, PCS, and PHY. Partner with Verification Engineers to define the test plan, execute … more
