- Google (Mountain View, CA)
- …related field, or equivalent practical experience. + 8 years of experience in CPU or AI accelerator logic/ RTL design , including microarchitecture definition ... and PPA optimizations. + Experience with RTL language (System Verilog) and related design ...benefits at Google (https://careers.google.com/benefits/) . + Participate in developing CPU subsystem. Focus on Advance Branch prediction algorithm and… more
- Google (Poughkeepsie, NY)
- …. + Contribute to CPU frontend designs, emphasizing on microarchitecture and RTL design for the next generation CPU . + Propose performance ... equivalent practical experience. + 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or… more
- Google (Austin, TX)
- …field, or equivalent practical experience. + 10 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... or SystemVerilog. + Experience with RTL language (eg SystemVerilog) and related design ...benefits at Google (https://careers.google.com/benefits/) . + Participate in developing CPU subsystem. Develop CPU subsystem front-end designs,… more
- Qualcomm (San Diego, CA)
- …Qualcomm CPU Engineer, you will lead innovative Central Processing Unit ( CPU ) design efforts that have a critical impact on industries across the world. ... Qualcomm Engineers collaborate with cross-functional teams to design , verify, and implement multi-core CPU operations...Design Engineer, you will work with microarchitecture and RTL design team to implement the designs… more
- Google (Mountain View, CA)
- …of experience in high-performance CPU , cache subsystem or AI accelerator logic/ RTL design including microarchitecture definition and PPA optimizations. + 6 ... + Lead and manage a team of design engineers working on CPU , cache subsystem,...into SoC, emphasizing on microarchitecture and RTL design for the next generation CPU subsystem.… more
- Google (Mountain View, CA)
- …of experience in high-performance CPU , cache subsystem or AI accelerator logic/ RTL design including microarchitecture definition and PPA optimizations. + 10 ... + Lead and manage a team of design engineers working on CPU , cache subsystem,...emphasizing on microarchitecture and Register-Transfer Level ( RTL ) design for the next generation CPU subsystem.… more
- Qualcomm (San Diego, CA)
- … PPA Pathfinding Engineer, you will work with Architecture, RTL , Physical Design , Circuits, CAD and Post-Silicon teams to lead the cutting-edge technology ... correlation Roles and Responsibilities + Collaborate with cross-functional teams ( RTL , Physical Design , Circuits, CAD) to address... Design , Circuits, CAD) to address critical physical design challenges in CPU implementations. + Develop… more
- Qualcomm (San Diego, CA)
- …on RTL and Netlist using tools like Joules and PTPX. + Work closely with RTL design , Synthesis, and physical design teams to measure and optimize power. ... Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** + Drive Power analysis and...+ Evaluate and propose new power optimization techniques at RTL , Synthesis and Physical Design Stages. +… more
- Google (Austin, TX)
- …performance angles. + Define and write CPU subsystem architecture specifications. + Lead the collaboration with RTL , design verification, and physical ... hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Lead CPU Performance Architect in architecture and performance, you… more
- Qualcomm (Santa Clara, CA)
- …features and sections of the CPU architectural performance/power model + Work with RTL and design team to assess implementation cost for new features + ... them, corelated and characterize them and work with the design team in productizing them. This will also include...consumption and estimating power as proxy. + Collaborate with CPU Performance Architecture and RTL team members… more