- Qualcomm (San Diego, CA)
- … team to complete the IP design implementation. + Support SoC team to integrate low power / power management IP solution into wireless SoC chips and ... functional safety feature in automotive SoC product. + Create/Enhance low power methodologies covering entire design...cycle from RTL to GDS. Analyze how a new methodology will affect different phases of the design… more
- Qualcomm (Santa Clara, CA)
- …ARM IPs. Experience in SoC low power micro-architecture, low power design and methodology , Power Intent/Implementation, power estimates, ... IPs. Experience in SoC low power micro-architecture, low power design and methodology , Power Intent/Implementation, power estimates, … more
- Google (Mountain View, CA)
- …memory subsystems. + 5 years of experience in SoC power management or low power design / methodology . + Experience with Application-Specific Integrated ... power analysis. + 8 years of experience in SoC power management or low power design / methodology . + Experience in CPU power in mobile SoCs… more
- Qualcomm (San Diego, CA)
- …of next Generation, high performance, low power Memory Subsystem RTL Design , flows and methodology for high performance ASICs in sub-4nm process for ... low power designs. + Strong knowledge in the entire low power , high performance ASIC/SoC design flows (micro-architecture, RTL design ,… more
- NVIDIA (Austin, TX)
- …+ Basic understanding of fundamental concepts of power and energy consumption, estimation, and low power design . + Basic understanding of chip design ... of the Architecture Energy Modeling Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software… more
- Amazon (Austin, TX)
- …multiple vendor solutions and driving tool decisions. - Experience in high-performance, low - power physical design , and implementation techniques with ... today. Key job responsibilities - You will create and support innovative physical design methodology and CAD flows. - Develop cloud infrastructure to support… more
- Qualcomm (San Diego, CA)
- … analysis concepts and on-hands experience with PTPX etc. ⦁ Sound conceptual understanding of low power design techniques like voltage/ power islands, ... and validate new flows and methodologies ⦁ Work on design power profiling and electromigration analysis ⦁...in languages such as Python, TCL, Perl ⦁ Strong methodology development background. Ability to drive solutions by creating… more
- NVIDIA (Santa Clara, CA)
- … Engineering + Proven track record of PPA improvement on high performance and low power designs in advanced technology nodes + Strong understanding of physical ... with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all...files such as UPF, and use of FSDB/SAIFs for power optimization + Understanding of hierarchical design ,… more
- Qualcomm (Austin, TX)
- …Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Physical Design Methodology Engineer, you will work with implementation and CAD teams ... power analysis. + Knowledge of high performance and low power implementation techniques + Proficiency in...data analytical skills to identify and root cause physical design issues. **Roles and Responsibilities** + Work with cross… more
- NVIDIA (Santa Clara, CA)
- …understanding of mathematics/physics fundamentals of electrical design . + Clear understanding of low power design techniques such as multi VT, Clock ... and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the...drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the… more
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