- Qualcomm (San Diego, CA)
- …understand the HW u-architecture of the infrastructure components involved, the memory system and interconnect, identify performance bottlenecks; define ... and design of Platform infrastructure HW components such as Memory controllers, System cache, System ...Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.… more
- NVIDIA (Madison, AL)
- …skills are required Ways to stand out from the crowd: + Prior sub - system level verification experience related to memory subsystem is a huge plus + ... We are now looking for a Senior ASIC Design Engineer! NVIDIA is seeking an outstanding...contribute to the design and implementation of a state-of-the-art memory management system with complicated design requirements.… more
- Amazon (Austin, TX)
- …- Have familiarity with key components such as interconnects, DMAs, Memory sub - systems , accelerator engines, debug and system level architectures - Have ... and Japan, and customers across all industries. Custom SoCs ( System on Chip) live at the heart of AWS...rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies… more
- Qualcomm (San Diego, CA)
- …Engineer, you will work with Chip Architects to validate the concepts of core and sub - system level micro-architectures. You will work on a selected part of the ... you will plan, design, optimize, verify, and test electronic systems , validate digital/analog designs and develop a comprehensive validation/verification testbench… more
- Broadcom (San Jose, CA)
- …expertise with Interface IP designs. Beneficial areas would include High bandwidth memory (HBM) PHY / controller sub - systems , Ethernet/PCIE/CXL (Physical ... duties: + Functional verification of complex designs, especially external interfacing IPs/ memory controllers. + Responsible for all aspects of verification from test… more
- Meta (Sunnyvale, CA)
- …research silicon to demonstrate and integrate advanced IP and AI accelerators into SOC/ ASIC solutions to enable in- system testing and prototyping. The goal is ... our front-end and back-end digital design efforts at the IP and sub - system levels. From microarchitecture definition and RTL implementation to synthesis… more
- Broadcom (Fort Collins, CO)
- …design backend flows, help define and influence sub - system content for memory interfaces, NOC, processor sub - systems et al. The individual will also ... to aid in overall closure and manufacture of the ASIC with emphasis on low power, optimized area, max....candidate should have a strong understanding of VLSI and ASIC physical design 12+ years of experience w/ a… more
- Samsung Electronics Co., Ltd. (Austin, TX)
- …with a PhD + Strong background owning and driving the RTL design of various sub -blocks of the coherent interconnect or memory controller or LLC for the high ... Our Team Our System IP team develops proprietary coherent interconnect and memory controller deployed in many high-volume products. Our team plays a key role in… more
- Google (Mountain View, CA)
- …use cases and applications, and how they relate to specific hardware blocks or sub - systems . You will represent the direction of the software team, their asking ... with computer architecture concepts, including microarchitecture, cache hierarchy, pipelining, and memory subsystems. + 5 years of software development experience in… more
- Qualcomm (San Diego, CA)
- …architecture team to define micro-architecture for various blocks of Hexagon DSP core and sub - system Develop RTL for multiple logic blocks of Hexagon DSP core ... and Automotive. This position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the...and sub - system for SoC integration Run various frontend… more
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