• Mixed - Signal and ASIC…

    Teradyne (Agoura Hills, CA)
    …Opportunity Overview Teradyne has an excellent opportunity for a talented Intern to join our Mixed Signal ASIC Test and Characterization team located in ... CA. + Setup and operation of lab instrumentation for test development of mixed signal ...Integrated Circuits "ASICs". + Assist with generation of the ASIC test plan by working with design,… more
    Teradyne (05/13/25)
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  • Analog/ Mixed Signal ASIC…

    Qualcomm (San Diego, CA)
    …Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > Analog Mixed Signal Design **General Summary:** QCT Mixed - Signal ... 5G, AI/ML, compute, and automotive applications. MSIP design team consists of architects, analog/ mixed signal and digital designers, protocol and signal … more
    Qualcomm (04/23/25)
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  • Analog Mixed Signal ASIC…

    IBM (Yorktown Heights, NY)
    …computing applications. Successful applicants will have demonstrated experience in RF, analog, and/or mixed signal circuit design. In this role, you may be ... technical and professional experience** '- Degree: Doctorate - RF, Analog, and/or mixed signal circuit design: Experience in schematic and physical design… more
    IBM (05/10/25)
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  • Senior Research Engineer - Analog & Mixed…

    GE Aerospace (Niskayuna, NY)
    …for high impedance sensors. + Demonstrated ability to develop novel, analog and mixed - signal ASIC solutions. + Demonstrated experience with wafer-level ... holders within and outside GE Research. + Design and test control loops in the mixed - signal...ASICs or devices + Demonstrated experience with Mixed - Signal simulation tools. + Demonstrated experience with ASIC… more
    GE Aerospace (05/15/25)
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  • Mixed Signal SVE Engineer

    Qualcomm (San Diego, CA)
    …of ASIC design, verification, validation, integration, or related work experience. The ** Mixed Signal SVE team** is seeking talented engineers to support the ... Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience....silicon bring-up efforts for mixed signal IPs, such as **DDRPHY** and… more
    Qualcomm (03/04/25)
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  • Digital ASIC Design Engineer for High-Speed…

    Qualcomm (San Diego, CA)
    …Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** Qualcomm mixed - signal IP design team is seeking talented senior ASIC ... - Assist in running the full suite of front-end ASIC design tools (lint checking, CDC, DFT, synthesis, FV,...compiler, Tessent, and Spyglass. **Preferred Qualifications** - Experience with mixed - signal IPs, such as SerDes, DDR, and… more
    Qualcomm (04/19/25)
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  • ASIC /FPGA Design Engineer, 5+ Years

    Lockheed Martin (Denver, CO)
    …in the design of any of the following: \- FPGAs \- Digital ASICs \- Mixed \- signal ASICs * HDL programming experience with VHDL, Verilog, and/or SystemVerilog\. * ... / FPGA life cycle \(architecture, design, simulation, verification, validation, integration & test \)\. * FPGA/ ASIC verification experience is a plus\. *… more
    Lockheed Martin (04/10/25)
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  • Sr. SOC/ ASIC Timing Signoff & Front-End…

    SpaceX (Bastrop, TX)
    …domain crossing paths at block and full chip level + Work with mixed signal IP/PLL/SerDes/PHY teams to drive integration, timing, logical equivalence checking ... Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon...internet to millions of users worldwide. We design, build, test , and operate all parts of the system -… more
    SpaceX (04/15/25)
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  • SOC/ ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    …design flow + Work with systems and architecture, SOC integration, verification, DFT, mixed signal , IP owners, synthesis, and place/route teams to address the ... SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon...internet to millions of users worldwide. We design, build, test , and operate all parts of the system -… more
    SpaceX (04/15/25)
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  • Senior ASIC Design Verification Engineer

    NVIDIA (Santa Clara, CA)
    …verification methodologies is a huge plus. + Strong knowledge or work experience in Mixed signal and custom designed IPs solutions. + Good understanding of ... NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off...behavioral real number modeling and low level digital or mixed signal design concepts. + Strong knowledge… more
    NVIDIA (03/06/25)
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